SST25VF080B-50-4C-PAE SST [Silicon Storage Technology, Inc], SST25VF080B-50-4C-PAE Datasheet - Page 9

• Manufacturer Part Number: SST25VF080B-50-4C-PAE
• Description: 8 Mbit SPI Serial Flash
• Manufacturer: SST [Silicon Storage Technology, Inc]

8 Mbit SPI Serial Flash
SST25VF080B
Read (25/33 MHz)
The Read instruction, 03H, supports up to 25 MHz (for
SST25VF080B-50-xx-xxxx)
SST25VF080B-80-xx-xxxx) Read. The device outputs the
data starting from the specified address location. The data
output stream is continuous through all addresses until ter-
minated by a low to high transition on CE#. The internal
address pointer will automatically increment until the high-
est memory address is reached. Once the highest memory
address is reached, the address pointer will automatically
©2010 Silicon Storage Technology, Inc.
FIGURE 5: Read Sequence
SCK
CE#
SO
SI
MODE 3
MODE 0
MSB
0 1 2 3 4 5 6 7 8
03
HIGH IMPEDANCE
or
33
MSB
ADD.
MHz
15 16
ADD.
(for
23 24
ADD.
9
increment to the beginning (wrap-around) of the address
space. Once the data from address location 1FFFFFH has
been read, the next output will be from address location
000000H.
The Read instruction is initiated by executing an 8-bit com-
mand, 03H, followed by address bits [A23-A0]. CE# must
remain active low for the duration of the Read cycle. See
Figure 5 for the Read sequence.
MSB
31 32
D
OUT
N
39 40
D
N+1
OUT
47 48
D
N+2
OUT
55 56
D
N+3
OUT
63 64
D
N+4
1296 ReadSeq_0.0
OUT
S71296-04-000
70
Data Sheet
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