lxt971a Intel Corporation, lxt971a Datasheet - Page 65

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lxt971a

Manufacturer Part Number
lxt971a
Description
3.3v Dual-speed Fast Ethernet Phy Transceiver
Manufacturer
Intel Corporation
Datasheet

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Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Figure 32. 10BASE-T Receive Timing
Table 33. 10BASE-T Receive Timing Parameters
RXD, RX_DV, RX_ER Setup to
RX_CLK High
RXD, RX_DV, RX_ER Hold from
RX_CLK High
TPFIP/N in to RXD out (Rx latency)
CRS asserted to RXD, RX_DV,
RX_ER asserted
RXD, RX_DV, RX_ER de-asserted to
CRS de-asserted
TPFI in to CRS asserted
TPFI quiet to CRS de-asserted
TPFI in to COL asserted
TPFI quiet to COL de-asserted
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. BT is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit rate.
testing.
10BASE-T bit time = 10
RX_CLK
RX_DV,
RX_ER
RXD,
CRS
TPFI
COL
Parameter
-7
s or 100 ns.
t
6
t
8
t
3
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
Sym
t
t1
t2
t3
t4
t5
t6
t7
t8
t9
4
Min
4.2
0.3
10
10
5
2
6
1
5
t
Typ
1
1
t
2
Max
6.6
0.5
32
28
10
31
10
Units
BT
BT
BT
BT
BT
BT
BT
ns
ns
t
t
2
7
9
Test Conditions
t
5
65

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