lxt972a Intel Corporation, lxt972a Datasheet - Page 29

• Manufacturer Part Number: lxt972a
• Description: 3.3v Dual-speed Fast Ethernet Transceiver Datasheet
• Manufacturer: Intel Corporation

3.7
3.7.1
.
Datasheet
Standard Data Flow
Scrambler Bypass Data Flow
Replaced by
/J/K/ code-groups
Start-of-Stream
Delimiter (SSD)
D0
D1
D2
D3
S0
S1
S2
S3
S4
P0
Figure 13. 100BASE-X Frame Format
Figure 14. 100BASE-TX Data Path
64-Bit Preamble
P1
(8 Octets)
Parallel
Parallel
Parallel
Parallel
Serial
Serial
Serial
Serial
to
to
to
to
P6
100Mbps Operation
100BASE-X Network Operations
During 100BASE-X operation, the LXT972A transmits and receives 5-bit symbols across the
network link.
actively transmitting data, the LXT972A sends out Idle symbols on the line.
In 100TX mode, the LXT972A scrambles and transmits the data to the network using MLT-3 line
code
and sent across the MII to the MAC.
Delimiter (SFD)
Start-of-Frame
SFD
(Figure 14 on page
D0 D1 D2 D3
DA
Figure 13
Address (6 Octets each)
Destination and Source
DA
3.3V Dual-Speed Fast Ethernet Transceiver Datasheet — LXT972A
SA
shows the structure of a standard frame packet. When the MAC is not
29). MLT-3 signals received from the network are descrambled, decoded,
4B/5B
SA
Packet Length
L1
S0 S1 S2 S3 S4
S0 S1 S2 S3 S4
(2 Octets)
L2
(Pad to minimum packet size)
D0
Data Field
D1
Scramble
Scramble
Dn
De-
Frame Check Field
(4 Octets)
CRC
End-of-Stream Delimiter (ESD)
MLT3
MLT3
/T/R/ code-groups
Replaced by
pattern: 0, +1, 0, -1, 0, +1...
pattern: 0, +1, 0, -1, 0, +1...
All transitions must follow
All transitions must follow
InterFrame Gap / Idle Code
0
0
I0
No Transition = 0.
No Transition = 0.
Transition = 1.
Transition = 1.
+1
+1
(> 12 Octets)
0
0
IFG
-1
-1
29
0
0