em78p210n ELAN Microelectronics Corp, em78p210n Datasheet - Page 26

• Manufacturer Part Number: em78p210n
• Description: 8-bit Microcontroller With Otp Rom
• Manufacturer: ELAN Microelectronics Corp

EM78P210N
8-Bit Microcontroller with OTP ROM
20 •
6.2.31 Bank 3-R7 (Noise and LVR Control) - only for ICE
[With EM78P210N]:
[With Simulator]:
Bits 7 ~ 6: not used, fixed to "0" all the time.
Bits 5 ~ 4 (TYPE1, TYPE0): Type selection for EM78P210N
Bit 3 (NRHL):
6.2.32 Bank 3-R8~RF (Reserve)
Bits 7~0: are not used, fixed to "0" all the time.
6.2.33 R10 ~ R1F
All of these are 8-bit general-purpose registers.
6.2.34 Banks 0~3 - R20 ~ R3F
All of these are 8-bit general-purpose registers.
EM78P210N
ICE210N
Bit 2 (NRE):
Bits 1 ~ 0 (LVR1 ~ LVR0): Low Voltage Reset enable bits. If Vdd has a crossover at
TYPE1, TYPE0
LVR1, LVR0
Bit
00
01
10
11
11
10
01
00
The noise rejection function is turned off in the LXT2 and in sleep mode.
Noise rejection high/low pulse defined bit. The INT pin is a falling
edge trigger
0 = Pulses equal to 8/fc [s] are regarded as signal.
1 = Pulses equal to 32/fc [s] are regarded as signal (default)
Noise rejection enable
0 = disable noise rejection
1 = enable noise rejection (default). However in Low Crystal
“0”
‘0’
7
oscillator (LXT) mode, the noise rejection circuit is always
disabled.
Unimplemented, read as ‘0’.
VDD Reset Level
Vdd reset level as Vdd changes, the system will be reset.
“0”
‘0’
6
NA (Power-on Reset) (default)
2.5V
3.0V
4.0V
EM78P210N-20Pin
EM78P210N-24Pin
TYPE1 TYPE0
(This specification is subject to change without further notice)
‘0’
MCU Type
5
Not used
NOTE
VDD Release Level
‘0’
4
Product Specification (V1.2) 04.22.2008
2.7V
3.2V
4.2V
NRHL
‘0’
3
NRE
‘0’
2
LVR1
‘0’
1
LVR0
‘0’
0