bt8375kpf Conexant Systems, Inc., bt8375kpf Datasheet - Page 147

• Manufacturer Part Number: bt8375kpf
• Description: Single Chip Transceivers For T1/e1 And Integrated Service Digital Network Isdn Primary Rate Interfaces Systems
• Manufacturer: Conexant Systems, Inc.

Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
TS[4:0]
DL3_BIT[7:0]
Bt8370/8375/8376 contains a single offline framer that serves as a shared resource for both receive and transmit
channels. Because current alignment status for receive and transmit channels is reported separately in Alarm
Status registers (ALM1, ALM2; addr 047, 048), FSTAT is used primarily for diagnostic purposes to monitor the
progress of an alignment search, or to verify acknowledgment of a processor-generated forced reframe request.
These status bits can only be reported for a very short period of time (i.e., 1 clock cycle), because the RLOF and
TLOF reframe requests can immediately request another offline framer search.
INVALID
N8370DSE
016— External Data Link Bit (DL3_BIT)
017— Offline Framer Status (FSTAT)
DL3_BIT[7]
—
7
7
DL3_BIT[6]
External Data LinkTime Slot Select—Picks 1 8-bit time slot for input and output over the
external data link pins. Any time slot can be chosen from TS0 to TS31 in E1 mode or TS1 to
TS24 in T1 mode. In T1 mode, TS25 selects F-bits instead of a channel time slot.
External Data Link Bit Select—Enables receive (RDLCKO) and transmit (TDLCKO) clock
pulse outputs during selected time slot bits. DL3_BIT works in conjunction with the DL3_TS
register [addr 015] to select any combination of bits for input and output on the external data
link pins by writing the corresponding DL3_BIT active (high). LSB enables clock pulses
coincident with the first bit transmitted or received. The full T1/E1 data stream is output on
RDLO as long as the RDL_IO bit [addr 018] is active, regardless of which bits are
accompanied by RDLCKO clock pulses. The selected transmit data link bits are sampled from
the TDLI pin on the falling edge of TDLCKO to replace normal transmitted data. DL3_BIT
must be set to 0x01 when DL3_TS selects T1 F-bits.
No Candidate—Active-high at the conclusion of a search during which no frame alignment
candidates were located.
—
6
6
DL3_BIT[5]
—
00000
00001
11110
11111
5
5
|
0 = disable DL3 bit
1 = enable DL3 bit
0 = search active, aborted, timed out, or found
1 = alignment not found (no candidate).
DL3_BIT[4]
INVALID
4
4
Conexant
Time slot 30
Time slot 31
Time slot 0
Time slot 1
|
DL3_BIT[3]
FOUND
3
3
DL3_BIT[2]
TIMEOUT
3.6 Primary Control and Status Registers
2
2
DL3_BIT[1]
ACTIVE
1
1
3.0 Registers
DL3_BIT[0]
RX/TXN
0
0
3-29