ml6692 Microsemi Corporation, ml6692 Datasheet - Page 15

• Manufacturer Part Number: ml6692
• Description: 100base-tx Physical Layer With
• Manufacturer: Microsemi Corporation

INITIALIZATION INTERFACE REGISTER
Note: Bits I<10:8> are the values for bits 1.11, 1.12 and 1.15 and initial values for bits 4.5, 4.6 and 4.9 of the MII Management Interface.
MII MANAGEMENT INTERFACE REGISTERS
0.6 – 0.0
I.5–I.0
BIT(S)
BIT(S)
0.15
0.14
0.13
0.12
0.11
0.10
I.15
I.14
I.13
I.12
I.11
I.10
0.9
0.8
0.7
I.9
I.7
I.6
I.8
Not used
Not Used
PHY A4
PHY A3
PHY A2
PHY A1
PHY A0
10HDUP
10FDUP
100T4
ISODIS
REPEATER
Reset
Loopback
Manual speed select
(Active when 0.12 = 0)
Auto negotiation enable
Power down
Isolate
Restart auto negotiation
Duplex mode
Collision Test
NAME
NAME
Table 1. Initialization Interface Register
1 = electrically isolate the ML6692 from MII
10BASE-T half duplex initialization bit
1 = 10BASE-T (half-duplex) capability
0 = no 10BASE-T (half-duplex) capability
10BASE-T full duplex initialization bit
1 = 10Mb/s full duplex capability
0 = no 10Mb/s full duplex capability
100BASE-T4 initialization bit
1 = 100BASE-T4 capability
0 = no 100BASE-T4 capability
Isolate bit disable (bit 0.10)
Repeater mode: when this bit is set to 1,
CRS isonly asserted when receiving non-idle
signal at TPINP/N, and the ML6692 is
forced to half duplex mode
1 = reset all register bits to defaults
0 = normal operation
1 = PMD loopback mode
0 = normal operation
1 = 100Mb/s
0 = 10Mb/s
1 = enable auto negotiation
0 = disable auto negotiation
1 = power down
0 = normal operation
0 = normal operation
1 = restart auto negotiation
0 = normal operation
1 = Full duplex select, auto negotiation disabled
0 = Half duplex select, auto negotiation disabled
1 = enable COL signal test
0 = normal operation
PHY address bit 4
PHY address bit 3
PHY address bit 2
PHY address bit 1
PHY address bit 0
Table 2. Control Register
DESCRIPTION
DESCRIPTION
R/W, SC
R/W, SC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DEFAULT
DEFAULT
ML6692
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
0
15