hy5ps1g821m Hynix Semiconductor, hy5ps1g821m Datasheet - Page 46

• Manufacturer Part Number: hy5ps1g821m
• Description: 1gb Ddr2 Sdram
• Manufacturer: Hynix Semiconductor

Rev. 0.2 / Oct. 2005
Burst Write with Auto-Precharge
If A10 is high when a Write Command is issued, the Write with Auto-Precharge function is engaged. The
DDR2 SDRAM automatically begins precharge operation after the completion of the burst write plus write
recovery time (tWR). The bank undergoing auto-precharge from the completion of the write burst may be
reactivated if the following two conditions are satisfied.
(1) The data-in to bank activate delay time (WR + tRP) has been satisfied.
(2) The RAS cycle time (tRC) from the previous bank activation has been satisfied.
Burst Write with Auto-Precharge (tRC Limit): WL = 2, tWR =2, BL = 4, tRP=3
Burst Write with Auto-Precharge (tWR + tRP): WL = 4, tWR =2, BL = 4, tRP=3
CK/CK
CMD
DQS/DQS
DQs
CK/CK
CMD
DQS/DQS
DQs
WRA BankA
WRA Bank A
Post CAS
A10 = 1
A10 = 1
Post CAS
T0
T0
T1
T3
WL =RL - 1 = 2
WL =RL - 1 = 4
NOP
NOP
DIN A
DIN A
T2
T4
NOP
NOP
0
0
DIN A
DIN A
1
1
DIN A
DIN A
T3
T5
NOP
NOP
Completion of the Burst Write
2
Completion of the Burst Write
2
DIN A
DIN A
3
3
T4
T6
NOP
NOP
T5
T7
NOP
NOP
> =
> =
> = t
> = t
Auto Precharge Begins
Auto Precharge Begins
WR
WR
RC
RC
T6
T8
NOP
NOP
1HY5PS12421(L)M
HY5PS12821(L)M
T7
T9
> = t
NOP
NOP
RP
Tm
T12
Bank A
Bank A
Active
Active
> = t
RP
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