hd66789 Renesas Electronics Corporation., hd66789 Datasheet - Page 101

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hd66789

Manufacturer Part Number
hd66789
Description
528-channel, One-chip Driver For Amorphous Tft Panels With 262,144-color Display Ram, Power Supply Circuit, And Gate Circuit
Manufacturer
Renesas Electronics Corporation.
Datasheet
HD66789
Notes to the high-speed RAM write mode
1.
2.
3.
4.
5.
6.
Rev.0.12, May 09 2003, page 101 of 156
The RAM write operation is executed every four words. If the RAM write operation is terminated
before all four-word data is written to RAM, the last data will not be written to RAM.
When the index register is set to R22H (RAM data write), the first RAM write operation is always
executed. In this case, the RAM data read is not operable simultaneously. During RAM read, set the
HWM to 0.
The high-speed RAM write mode is not compatible with the normal RAM write mode. When the
mode must be switched to the other, make a new address set before starting RAM write.
When writing data in the high speed RAM write mode within the range specified with the window
address, some window-address range may require dummy write operation. See “High-Speed RAM
Write with Window Address Function”.
The logical/compare operations are not available.
The RAM write operation is executed every four words. Set the lower 2 bits of the addresses as
follows when setting the address.
(input/output)
DB15-0
(input)
(input)
CS*
E
Operation of High-Speed Consecutive Writing to RAM (8-Bit Interface)
(R22)
Index
*When ID0=0, the lower two bits in the address must be set to 11 before RAM write.
*When ID0=1, the lower two bits in the address must be set to 00 before RAM write.
Upper
RAM
data
1
1
lower
RAM
data
2
1
Upper
RAM
data
3
2
lower
RAM
data
4
RAM address
Note : In the high-speed mode (HWM), data are written to the RAM every 4 words. This means in the 8-bit interface mode,
2
(AC15 to 0)
Upper
RAM
data are written to the RAM for every eight write operation.
data
5
3
RAM write data
(64 its)
RAM
lower
data
6
3
“The lower two bits of the address must be set as follows in high-speed write mode.
When ID0 = 0, set the lower two bits of the address to 11.
When ID1 = 1, set the lower two bits of the address to 00.
Upper
RAM
data
7
4
lower
RAM
data
8
4
RAM write
execution time
“0000”H
RAM data 1 to 4
Upper
RAM
data
1
1
RAM
lower
2
data
1
Upper
RAM
3
data
2
RAM
lower
data
4
2
“0004”H
Upper
RAM
5
data
3
lower
RAM
6
data
3
Upper
RAM
data
7
4
RAM
lower
data
8
4
RAM write
execution time
RAM data 5 to 8
Preliminary
*Note

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