hd66789 Renesas Electronics Corporation., hd66789 Datasheet - Page 89

• Manufacturer Part Number: hd66789
• Description: 528-channel, One-chip Driver For Amorphous Tft Panels With 262,144-color Display Ram, Power Supply Circuit, And Gate Circuit
• Manufacturer: Renesas Electronics Corporation.

HD66789
VLD and ENABLE signals
The relationship with the VLD and ENABLE signals is as follows. With the ENABLE signal, the
addresses are not updated during data write, while with the VLD signal, the addresses are updated during
data write when the ENABLE is “Low”. The polarity of the ENABLE signal is inverted by the setting of
EPL bit.
EPL
0
0
0
1
1
1
RGB interface timing
The timing chart of 16/18-bit RGB interfaces is as follows.
Rev.0.12, May 09 2003, page 89 of 156
ENABLE
0
0
1
0
1
1
ENABLE
DOTCLK
HSYNC
VSYNC
PD17-0
C
VLD
DOTCLK
ENABLE
VSYNC
HSYNC
PD17-0
VL D
Note: Data to be displayed must be written in the high-speed write mode (HWM = 1) in
RGB I/F mode.
Back porch period
1 clock
HLW >= 1CLK
DTST >=HLW
VLD
0
1
*
*
0
1
16-/18-bit RGB Interface Timing
1 frame
DTST:
VLW: the period in which VSYNC is low level
HLW:
the period in which HSYNC is low level
the set up time for data transmission
Front porch period
Valid data
>= 1H
1H
RAM Write
Valid
Invalid
Invalid
Invalid
Valid
Invalid
RAM Address
Updated
Updated
Unchanged
Unchanged
Updated
Updated
Preliminary