pallv16v8 Lattice Semiconductor Corp., pallv16v8 Datasheet - Page 18

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pallv16v8

Manufacturer Part Number
pallv16v8
Description
Low Voltage, Zero Power 20-pin Ee Cmos Universal Programmable Array Logic
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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ENDURANCE CHARACTERISTICS
The PALLV16V8 is manufactured using Vantis’ advanced electrically-erasable (EE) CMOS process.
This technology uses an EE cell to replace the fuse link used in bipolar parts. As a result, devices
can be erased and reprogrammed—a feature which allows 100% testing at the factory.
ROBUSTNESS FEATURES
The PALLV16V8 has some unique features that make it extremely robust, especially when operating
in high-speed design environments. Pull-up resistors on inputs and I/O pins cause unconnected
pins to default to a known state. Input clamping circuitry limits negative overshoot, eliminating the
possibility of false clocking caused by subsequent ringing. A special noise filter makes the
programming circuitry completely insensitive to any positive overshoot that has a pulse width of
less than about 100 ns.
INPUT/OUTPUT EQUIVALENT SCHEMATICS
18
t
N
DR
Symbol
Protection
Clamping
Parameter
Min Pattern Data Retention Time
Max Reprogramming Cycles
ESD
and
> 50 k
V
PALLV16V8-10 and PALLV16V8Z-20 Families
CC
5-V Protection
Programming
Pins only
Protection and
Provides ESD
V
Clamping
CC
Test Conditions
Max Storage Temperature
Max Operating Temperature
Normal Programming Conditions
Typical Output
Typical Input
V
CC
Programming
Detection
Voltage
> 50 k
V
Circuitry
Preload
CC
Overshoot
Positive
Filter
Feedback
Input
Value
100
10
20
17713D-14
Programming
Circuitry
17713D-15
Cycles
Unit
Years
Years

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