m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 283

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

Fig. 11.3.6 Example of transmit timing (when internal clock and CTS function selected)
Fig. 11.3.7 Example of transmit timing (when internal clock selected and CTS function not selected)
SERIAL I/O
11.3 Clock synchronous serial I/O mode
11-28
interrupt request bit
Transmit enable bit
Transmit register
Transmit buffer
UARTi transmit
interrupt request bit
Transmit enable bit
Transfer clock
Transmit register
Transmit buffer
UARTi transmit
empty flag
empty flag
Transfer clock
The above timing diagram applies when
the following conditions are satisfied:
empty flag
empty flag
CTS
T
CLK
TxD
Internal clock selected
CTS function selected
CLK polarity select bit = 0
END
The above timing diagram applies
when the following conditions are
satisfied:
i
i
T
i
i
CLK
TxD
Internal clock selected
CTS function not selected
CLK polarity select bit = 0
END
i
i
i
Data is set in UARTi transmit buffer register.
D
Data is set in UARTi transmit buffer register.
0
D
0
D
1
D
1
D
T
2
CLK
T
D
CLK
2
D
3
D
3
D
UARTi transmit register UARTi transmit buffer register.
Tc
4
UARTi transmit register
D
7905 Group User’s Manual Rev.1.0
Tc
4
D
5
T
Tc = T
D
ENDi
5
D
6
T
Tc = T
: Next transmit conditions are examined when this signal level is “H.”
D
(T
fi: BRGi count source frequency
n: Value set in BRGi
ENDi
CLK
6
D
ENDi
7
Cleared to “0” when interrupt request is accepted or cleared to “0” by software.
Stopped because CTS
D
: Next transmit conditions are examined when this signal level is “H.”
= 2(n+1) /fi
(T
fi: BRGi count source frequency
n: Value set in BRGi
CLK
7
is an internal signal. Accordingly, it cannot be read from the external.)
ENDi
Cleared to “0” when interrupt request is accepted or cleared to “0” by software.
D
= 2(n+1) /fi
0
D
is an internal signal. Accordingly, it cannot be read from the external.)
0
D
1
D
1
UARTi transmit buffer register.
D
2
D
2
D
D
3
3
i
D
= “H.”
D
4
4
D
D
5
5
D
D
6
6
D
D
7
7
Stopped because transmit enable bit = “0.”
Stopped because transmit enable bit = “0.”
D
D
0
0
D
D
1
1
D
D
2
2
D
D
3
3
D
D
4
4
D
D
5
5
D
D
6
6
D
D
7
7