m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 389

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

DEBUG FUNCTION
17.2 Block description
17-4
Fig. 17.2.3 Structure of debug control register 1
17.2.2 Debug control register 1
Figure 17.2.3 shows the structure of the debug control register 1.
(2) Detect enable bit (bit 5)
(1) Address compare register access enable bit (bit 2)
(2) Address-matching-detection 2 decision bit (bit 6)
Debug control register 1
Notes 1: At power-on reset, each bit become “0”; at hardware reset or software reset, each bit retains the value immediately before reset.
If any selected condition is satisfied when this bit = “1,” an address matching detection interrupt
request occurs.
Setting this bit to “1” enables reading from or writing to the contents of address compare registers 0
and 1 (addresses 68
Be sure to set this bit to “1” immediately before reading from or writing to the address compare
registers 0 and 1, and then clear it to “0” immediately after this reading or writing.
When the address matching detection 2 is selected, this bit is used to decide which of the addresses
being set in the address compare registers 0 and 1 matches with the contents of PG and PC.
This bit is cleared to “0” when the contents of PG and PC matches with the address being set in
address compare register 0 and set to “1” when the contents of PG and PC match with the one being
set in the address compare register 1.
This bit is invalid when the address matching detection 0 and 1 are selected.
Bit
0
1
2
3
4
5
6
7
2: Be sure to set this bit to “1” immediately before the access to the address compare registers 0 and 1 (addresses 68
6D
Fix this bit to “0.”
The value is “0” at reading.
Address compare register
access enable bit (Note 2)
Fix this bit to “1” when using the debug function.
Nothing is assigned.
While a debugger is not used, the value is “0” at reading.
While a debugger is used, the value is “1” at reading.
Address-matching-detection 2
decision bit
(Valid when the address match-
The value is “0” at reading.
ing detection 2 is selected.)
16
). Then, be sure to clear this bit to “0” immediately after this access.
Bit name
16
(Address 67
to 6D
16
), while clearing this bit to “0” disables this reading or writing.
16
7905 Group User’s Manual Rev.1.0
)
0 : Disabled.
1 : Enabled.
0 : Matches with the contents of the address com-
1 : Matches with the contents of the address com-
pare register 0.
pare register 1.
Function
b7 b6 b5 b4 b3 b2 b1 b0
(Note 1)
(Note 1)
Undefined
At reset
1
0
0
0
0
0
R/W
RW
RW
RW
RO
RO
RO
—
—
16
0
to