RF38F001000YBQ0 NUMONYX [Numonyx B.V], RF38F001000YBQ0 Datasheet - Page 31

• Manufacturer Part Number: RF38F001000YBQ0
• Description: Wireless Flash Memory (W18/W30 SCSP)
• Manufacturer: NUMONYX [Numonyx B.V]

32WQ and 64WQ Family with Asynchronous RAM
Table 15: Flash + SRAM Bus Operations
Table 16: Flash + PSRAM Bus Operations
November 2007
Order Number: 251407-13
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Read
Write
Output
Disable
Standby
Data
Retention
Sync
Array
Read
All Async/
Sync Non-
array
Read
Write
Output
Disable
Standby
Reset
Mode
Mode
For asynchronous read operation, all die may be simultaneously selected, but may not simultaneously drive the
memory bus.
WAIT is only valid during synchronous flash reads. WAIT is driven if F-CE# is asserted.
For flash die, F[2:1]-OE# and F-WE# should never be asserted simultaneously. If done so, F[2:1]-OE# will
override F-WE#.
For SRAM, R-OE# and R-WE# should never be asserted simultaneously.
X can be V
Flash CFI query and status register accesses use D[7:0] only, all other reads use D[15:0].
Refer to W18 and W30 datasheet for valid D
The SRAM is enabled and/or disabled with the logical function: S-CS1# OR S-CS2.
The SRAM can be placed into data retention mode by lowering S-VCC to the V
IL
H
H
H
H
H
L
or V
IH
H
X
Flash must be in High-Z
L
L
L
L
Any flash mode allowed
for inputs, V
H
H
X
X
L
L
PPL
H
H
H
X
X
L
, V
PPH
L
X
X
X
X
X
or V
IN
PPLK
V
V
during flash writes.
or
PPH
X
X
PPL
X
X
X
for F-VPP.
Active
Asserted
Asserted
Active
High-Z
High-Z
H
X
L
L
L
Any PSRAM mode allowed
PSRAM must be in High-Z
Same as SRAM standby
H
H
H
X
L
DR
limit when in standby mode.
H
X
X
L
H
H
X
L
X
X
L
L
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
SRAM
SRAM
SRAM
SRAM
SRAM
Flash
Flash
Flash
Flash
Flash
Flash
D
D
D
D
D
OUT
OUT
OUT
IN
IN
Datasheet
1, 4,
8, 2
4, 5,
8, 2
5, 2
5, 8,
2
9, 2
1, 2,
3, 4, 6
1, 2,
3, 4,
6, 7
3, 4,
6, 8
6
6
6
31