sii1161 Silicon image, sii1161 Datasheet - Page 32

• Manufacturer Part Number: sii1161
• Description: Panellink Receiver
• Manufacturer: Silicon image

SiI-DS-0096-D
Table 14. 18-bit One Pixel per Clock Input with 18-bit Two Pixels per Clock Output TFT Mode
TFT VGA Output
Shift CLK
VSYNC
HSYNC
18-bpp
G0
G1
G2
G3
G4
G5
R0
R1
R2
R3
R4
R5
DE
B0
B1
B2
B3
B4
B5
VSYNC
HSYNC
DIE10
DIE11
DIE12
DIE13
DIE14
DIE15
DIE16
DIE17
DIE18
DIE19
DIE20
DIE21
DIE22
DIE23
IDCK
DIE0
DIE1
DIE2
DIE3
DIE4
DIE5
DIE6
DIE7
DIE8
DIE9
160
DE
Tx Input Data
VSYNC
HSYNC
IDCK
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
164
DE
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
28
VSYNC
HSYNC
ODCK
QO10
QO11
QO12
QO13
QO14
QO15
QO16
QO17
QO18
QO19
QO20
QO21
QO22
QO23
QE10
QE11
QE12
QE13
QE14
QE15
QE16
QE17
QE18
QE19
QE20
QE21
QE22
QE23
1161
QO0
QO1
QO2
QO3
QO4
QO5
QO6
QO7
QO8
QO9
QE0
QE1
QE2
QE3
QE4
QE5
QE6
QE7
QE8
QE9
DE
Tx Output Data
Shift CLK/2
HSYNC
VSYNC
141B
Q10
Q11
Q12
Q13
Q14
Q15
Q16
Q17
Q18
Q19
Q20
Q21
Q22
Q23
Q24
Q25
Q26
Q27
Q28
Q29
Q30
Q31
Q32
Q33
Q34
Q35
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
DE
TFT Panel Input
SiI 1161 PanelLink Receiver
Shift CLK/2
HSYNC
VSYNC
18-bpp
G0 – 0
G1 – 0
G2 – 0
G3 – 0
G4 – 0
G5 – 0
G0 – 1
G1 – 1
G2 – 1
G3 – 1
G4 – 1
G5 – 1
R0 – 1
R1 – 1
R2 – 1
R3 – 1
R4 – 1
R5 – 1
B0 – 0
B1 – 0
B2 – 0
B3 – 0
B4 – 0
B5 – 0
R0 – 0
R1 – 0
R2 – 0
R3 – 0
R4 – 0
R5 – 0
B0 – 1
B1 – 1
B2 – 1
B3 – 1
B4 – 1
B5 – 1
DE
Data Sheet