ch7007a Chrontel, ch7007a Datasheet - Page 35

• Manufacturer Part Number: ch7007a
• Description: Ch7007a Digital Pc To Tv Encoder
• Manufacturer: Chrontel

CHRONTEL
When the CH7007 is operating in the slave clock mode, the ACIV bit in register 21H should be set to “1” and the
CFRB bit in register 06H should be set to “0”.
*Note: For reduced cross-color and cross-luminance artifacts, a value of 488,265,597 can be used with CFRB = "0"
Register 1BH, bit 4 (P-OUTP) controls the polarity of the P-OUT pin.
Register 1BH, bit 5 controls the P-OUT drive level, and should be set to 0 when DVDD2 is 1.8V, and set
to 1 when DVDD2 is 3.3V.
Register 1BH, bits 7 and 6 control the GPIO pins. When the corresponding GOENB bits are low, these
registers values are driven out of the GPIO pins. When the corresponding GOENB bits are high, these
registers values can be read to determine the level forced into the GPIO pins.
201-0000-002
Table 25.FSCI Values (625-Line Modes)
Bit:
Symbol:
Type:
Default:
Mode
13
14
15
19
20
21
25
0
1
4
5
8
9
& ACIV = "0".
7
GPIOIN1
R/W
0
Rev. 2.95, 6/24/2004
“Normal Dot Crawl”
6
GPIOIN0
R/W
0
488,262,757*
806,021,060
644,816,848
601,829,058
485,346,014
677,057,690
537,347,373
806,021,060
644,816,848
537,347,373
645,499,916
528,951,320
705,268,427
PAL
5
DVDD2
R/W
0
4
P-OUTP
R/W
0
3
FSCI19
R/W
0
“Normal Dot Crawl”
651,209,077
520,967,262
392,125,896
547,015,625
434,139,385
651,209,077
520,967,262
434,139,385
521,519,134
427,355,957
394,482,422
569,807,942
486,236,111
PAL-N
2
FSCI18
0
R/W
Symbol:
Address: 1BH
Bits: 8
1
FSCI17
R/W
0
CH7007A
0
FSCI16
R/W
0
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