UPD16488AP NEC [NEC], UPD16488AP Datasheet - Page 48

• Manufacturer Part Number: UPD16488AP
• Description: 1/92 DUTY LCD CONTROLLER/DRIVER WITH FOUR-LEVEL GRAY SCALE, ON-CHIP RAM
• Manufacturer: NEC [NEC]

Table 5-20, based on the PID5 to PID0 bit settings in the partial AC driver inversion cycle register (R8).
the partial AC driver inversion position shift register (R9).
Caution The inversion position shift amount can not be over 91 (5CH). If 91 is exceeded, operation is not guaranteed.
In partial display mode, the AC driver inversion cycle can be set for any number of inverted (reverse display) lines listed in
The shift amount for each displayed frame can be set as shown in Table 5-21 via settings made to bits PSD5 to PSD0 in
Be sure to maintain the following relationship among the display size, AC inversion cycle, and AC inversion position.
Caution Setting a small inversion cycle will cause a reduction in the IC's display drive capacity and an increase
48
in the current consumption. We therefore recommend determining the inversion cycle after making a
thorough evaluation of the actual LCD panel.
MSD6
0
0
0
0
1
1
1
1
PSD5
Table 5-21. Setting of Partial AC Driver Inversion Position Shift Register (R9)
0
0
0
0
1
1
1
Table 5-20. Settings of Partial AC Driver Inversion Cycle Register (R8)
Display size (duty)
MSD5
Table 5-19. Settings of AC Driver Inversion Position Shift Register
PID5
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
PSD4
0
0
0
0
0
0
0
MSD4
PID4
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
PSD3
0
0
0
0
0
0
0
MSD3
PID3
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
:
PSD2
:
AC inversion cycle
0
0
0
0
0
1
1
:
Data Sheet S15745EJ2V0DS
MSD2
PID2
0
0
0
0
0
0
0
1
0
0
0
0
0
1
1
PSD1
0
0
1
1
1
0
0
MSD1
PID1
0
0
1
1
0
1
1
0
0
0
1
1
1
0
0
PSD0
0
1
0
1
1
0
1
AC inversion shift amount
MSD0
PID0
0
1
0
1
1
0
1
0
0
1
0
1
1
0
1
Inversion Position Shift Amount
Inversion Position Shift Amount
Inverted Lines
36
37
38
35
36
37
1
2
3
4
0
1
2
3
:
:
prohibited
89
90
91
0
1
2
3
:
PD16488A