kac-9630 ETC-unknow, kac-9630 Datasheet - Page 9

• Manufacturer Part Number: kac-9630
• Description: Cmos Image Sensor 126 H X 98 V Ultra Sensitive Global Shutter 580 Fps Monochrome Cis
• Manufacturer: ETC-unknow

IMAGE SENSOR SOLUTIONS
Light Capture and Conversion
The KAC-9630 contains a CMOS active pixel array consisting of
101 rows by 128 columns. The last row in the array consists of
optically shielded (black) pixels as shown in figure below.
At the beginning of a given integration time the on-board timing
and control circuit will reset every pixel in the array simulta-
neously.
At the end of the integration time, the timing and control circuit
will stop the integration time of every pixel in the array simulta-
neously.
There is no delay between the beginning of the integration
period for the first and last pixels of a given frame.
At the end of the integration time, the timing and control circuit
will address each row and simultaneously transfer the integrated
value of the pixel to a correlated double sampling circuit and
then to a shift register as shown in figure 7.
Once the correlated double sampled data has been loaded into
the shift register, the timing and control circuit will shift them out
one pixel at a time starting with column “a”.
The pixel data is then fed into an analog video amplifier, where a
user programmed gain can be applied.
After gain adjustment the analog value of each pixel is con-
verted to 8 bit digital data as shown in figure 8.
General System Overview
www.kodak.com/go/imagers 585-722-4385
Figure 7: CMOS APS Row and Column addressing scheme
black pixels
monochrome active pixels
1 row of
128 columns,100 rows
Analog Data Out
Figure 6: CMOS APS region of the KAC-9630
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
a b c d e f g h i
CDS/Shift Register
j
k l m n o p q r
9
Program and Control Interfaces
The programming, control and status monitoring of the KAC-
9630 is achieved through a four wire serial bus. (see figure 9).
Readout
The row of black pixels is always read out first, one pixel at a
time, starting with the left most pixel. This is followed by the con-
secutive reading out of every pixel in every row of the active
pixel array, one pixel at a time, starting with the left most pixel in
the top most row. Hence, for the example shown in figure 10, the
read out order will be a0,b0,...,r0 then a1,b1,...,r1 and so on until
pixel r20 is read out.
Analog pixel values
Register Bank
Figure 9: Control Interface to the KAC-9630.
Figure 8: Analog Signals In, Digital Data Out.
10
12
13
14
15
16
17
18
19
20
11
0
1
2
3
4
5
6
7
8
9
a b c d e f g h i j k l m n o p q r
Figure 10: Array Readout
Gain
AMP
Column/Horizontal
Serial I/F
Email:[e-mail]
8 Bit A/D
Digital pixel data
sclk
sda