PLL520-20 PhaseLink (PLL), PLL520-20 Datasheet - Page 3

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PLL520-20

Manufacturer Part Number
PLL520-20
Description
, 120-200MHz In, 120-200MHz Out, Pecl,lvds
Manufacturer
PhaseLink (PLL)
Datasheet
4. General Electrical Specifications
5. Jitter specifications
Measured on Wavecrest SIA 3000
6. Phase noise specifications
Note: Phase Noise measured at VCON = 0V
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Supply Current (Loaded Outputs)
Operating Voltage
Output Clock Duty Cycle
Short Circuit Current
Period jitter RMS at 155MHz
Period jitter peak-to-peak at 155MHz
Accumulated jitter RMS at 155MHz
Accumulated jitter peak-to-peak at 155MHz
Random Jitter
Integrated jitter RMS at 155MHz
Phase Noise
relative to carrier
PARAMETERS
PARAMETERS
Low Phase Noise VCXO (for 120-200MHz Fundamental Crystals)
PARAMETERS
FREQUENCY
155.52MHz
SYMBOL
V
I
DD
DD
At 155.52MHz, with capacitive
decoupling between VDD and GND.
Over 10,000 cycles
At 155.52MHz, with capacitive
decoupling between VDD and GND.
Over 1,000,000 cycles.
“RJ” measured on Wavecrest SIA 3000
Integrated 12 kHz to 20 MHz
@ 1.25V (LVDS)
@ Vdd – 1.3V (PECL)
@10Hz
-75
CONDITIONS
CONDITIONS
PECL/LVDS
@100Hz
-95
@1kHz
-125
Preliminary
MIN.
MIN.
3.13
45
45
@10kHz
-140
TYP.
TYP.
18.5
2.5
2.5
2.5
0.3
PLL520-20
24
50
50
50
@100kHz
100/80/40
Rev 7/01/03 Page 3
-145
MAX.
MAX.
3.47
0.4
55
55
20
27
UNITS
dBc/Hz
UNITS
UNITS
ps
ps
ps
ps
mA
mA
%
V

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