CY28411OCT SPECTRALINEAR [SpectraLinear Inc], CY28411OCT Datasheet - Page 6

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CY28411OCT

Manufacturer Part Number
CY28411OCT
Description
Clock Generator for Intel Alviso Chipset
Manufacturer
SPECTRALINEAR [SpectraLinear Inc]
Datasheet
Rev 1.0, November 22, 2006
Byte 3: Control Register 3 (continued)
Byte 4: Control Register 4
Byte 5: Control Register 5
Bit
Bit
Bit
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
@Pup
@Pup
@Pup
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
SRC[T/C][7:0]
SRC[T/C][7:0]
DOT96T/C
CPU[T/C]2
CPU[T/C]1
CPU[T/C]0
CPU[T/C]2
CPU[T/C]1
CPU[T/C]0
CPU[T/C]2
CPU[T/C]1
CPU[T/C]0
Reserved
Reserved
Name
Name
PCIF1
PCIF0
Name
SRC4
SRC3
SRC2
SRC1
SRC0
CPU[T/C]2 Stop Drive Mode
CPU[T/C]1 Stop Drive Mode
CPU[T/C]0 Stop Drive Mode
Allow control of SRC[T/C]4 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Allow control of SRC[T/C]3 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Allow control of SRC[T/C]2 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Allow control of SRC[T/C]1 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Allow control of SRC[T/C]0 with assertion of PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Reserved, Set = 0
DOT_PWRDWN Drive Mode
0 = Driven in PWRDWN, 1 = Hi-Z
Reserved, Set = 0
Allow control of PCIF1 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Allow control of PCIF0 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Allow control of CPU[T/C]2 with assertion of CPU_STP#
0 = Free running, 1 = Stopped with CPU_STP#
Allow control of CPU[T/C]1 with assertion of CPU_STP#
0 = Free running, 1 = Stopped with CPU_STP#
Allow control of CPU[T/C]0 with assertion of CPU_STP#
0 = Free running, 1 = Stopped with CPU_STP#
SRC[T/C] Stop Drive Mode
0 = Driven when PCI_STP# asserted,1 = Hi-Z when PCI_STP# asserted
0 = Driven when CPU_STP# asserted,1 = Hi-Z when CPU_STP# asserted
0 = Driven when CPU_STP# asserted,1 = Hi-Z when CPU_STP# asserted
0 = Driven when CPU_STP# asserted,1 = Hi-Z when CPU_STP# asserted
SRC[T/C] PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Hi-Z when PD asserted
CPU[T/C]2 PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Hi-Z when PD asserted
CPU[T/C]1 PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Hi-Z when PD asserted
CPU[T/C]0 PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Hi-Z when PD asserted
Description
Description
Description
CY28411
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