CY28435OXCT SPECTRALINEAR [SpectraLinear Inc], CY28435OXCT Datasheet - Page 5

• Manufacturer Part Number: CY28435OXCT
• Description: Clock Generator for Intel Grantsdale Chipset
• Manufacturer: SPECTRALINEAR [SpectraLinear Inc]

Rev 1.0, November 20, 2006
Control Registers
Byte 0: Control Register 0
Byte 1: Control Register 1
Byte 2: Control Register 2
Bit
Bit
Bit
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
7
6
5
4
3
2
1
@Pup
@Pup
@Pup
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
1
1
1
1
1
1
1
SRC[T/C]4_SATA
RESERVED
DOT_96T/C
RESERVED
SRC[T/C]7
SRC[T/C]6
SRC[T/C]5
SRC[T/C]3
SRC[T/C]2
SRC[T/C]1
CPU[T/C]1
CPU[T/C]0
USB48_0
PCIF0
Name
Name
PCIF2
Name
REF0
CPU
PCI5
PCI4
PCI3
PCI2
PCI1
PCI0
CPU[T/C]0 Output Enable
SRC[T/C]7 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]6 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]5 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]4_SATA Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]3 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]2 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]1 Output Enable
0 = Disable (Tri-state), 1 = Enable
RESERVED, Set = 1
PCIF0 Output Enable
0 = Disabled, 1 = Enabled
DOT_96 MHz Output Enable
0 = Disable (Tri-state), 1 = Enabled
USB48_0 MHz Output Enable
0 = Disabled, 1 = Enabled
REF0 Output Enable
0 = Disabled, 1 = Enabled
RESERVED, Set = 0
CPU[T/C]1 Output Enable
0 = Disable (Tri-state), 1 = Enabled
0 = Disable (Tri-state), 1 = Enabled
PLL1 (CPU PLL) Spread Spectrum Enable
0 = Spread off, 1 = Spread on
PCI5 Output Enable
0 = Disabled, 1 = Enabled
PCI4 Output Enable
0 = Disabled, 1 = Enabled
PCI3 Output Enable
0 = Disabled, 1 = Enabled
PCI2 Output Enable
0 = Disabled, 1 = Enabled
PCI1 Output Enable
0 = Disabled, 1 = Enabled
PCI0 Output Enable
0 = Disabled, 1 = Enabled
PCIF2 Output Enable
0 = Disabled, 1 = Enabled
Description
Description
Description
CY28435
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