ADR435 AD [Analog Devices], ADR435 Datasheet - Page 28

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ADR435

Manufacturer Part Number
ADR435
Description
Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output
Manufacturer
AD [Analog Devices]
Datasheet

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AD5735
THEORY OF OPERATION
The
voltage output converter designed to meet the requirements of
industrial process control applications. It provides a high precision,
fully integrated, low cost, single-chip solution for generating
current loop and unipolar/bipolar voltage outputs.
The current ranges available are 0 mA to 20 mA, 4 mA to 20 mA,
and 0 mA to 24 mA. The voltage ranges available are 0 V to 5 V,
±5 V, 0 V to 10 V, and ±10 V. The current and voltage outputs
are available on separate pins, and only one output is active at
any one time. The output configuration is user-selectable via the
DAC control register.
On-chip dynamic power control minimizes package power
dissipation in current mode (see the Dynamic Power Control
section).
DAC ARCHITECTURE
The DAC core architecture of the
matched DAC sections. A simplified circuit diagram is shown
in Figure 69. The four MSBs of the 12-bit data-word are decoded
to drive 15 switches, E1 to E15. Each switch connects one of
15 matched resistors either to ground or to the reference buffer
output. The remaining eight bits of the data-word drive Switch S0
to Switch S7 of an 8-bit voltage mode R-2R ladder network.
The voltage output from the DAC core can be
Both the voltage and current outputs are supplied by V
The current and voltage are output on separate pins and cannot
be output simultaneously. The current and voltage output pins
of a channel can be tied together (see the Voltage and Current
Output Pins on the Same Terminal section).
AD5735
12-BIT
Buffered and scaled to output a software selectable
unipolar or bipolar voltage range (see Figure 70)
Converted to a current, which is then mirrored to the
supply rail so that the application sees only a current
source output (see Figure 71)
DAC
2R
8-BIT R-2R LADDER
S0
2R
is a quad, precision digital-to-current loop and
SCALING
RANGE
S1
2R
Figure 69. DAC Ladder Structure
Figure 70. Voltage Output
S7
2R
FOUR MSBs DECODED INTO
V
OUT_X
15 EQUAL SEGMENTS
AD5735
2R
E1
SHORT FAULT
E2
2R
consists of two
+V
V
–V
OUT_X
2R
E15
SENSE_X
SENSE_X
V
BOOST_x
OUT
Rev. B | Page 28 of 48
.
Voltage Output Amplifier
The voltage output amplifier is capable of generating both
unipolar and bipolar output voltages. It is capable of driving a
load of 1 kΩ in parallel with 1 µF (with an external compen-
sation capacitor) to AGND. The source and sink capabilities
of the output amplifier are shown in Figure 22. The slew rate is
1.9 V/µs with a full-scale settling time of 18 µs max (10 V step).
If remote sensing of the load is not required, connect +V
directly to V
−V
tion. The difference in voltage between +V
should be added directly to the headroom requirement.
Driving Large Capacitive Loads
The voltage output amplifier is capable of driving capacitive
loads of up to 2 µF with the addition of a 220 pF, nonpolarized
compensation capacitor on each channel. The 220 pF capacitor
is connected between the COMP
Care should be taken to choose an appropriate value of com-
pensation capacitor. This capacitor, while allowing the
to drive higher capacitive loads and reduce overshoot, increases
the settling time of the part and, therefore, affects the bandwidth
of the system. Without the compensation capacitor, capacitive
loads of up to 10 nF can be driven.
Reference Buffers
The
reference. The reference input requires a 5 V reference for
specified performance. This input voltage is then buffered
before it is applied to the DAC.
SENSE_x
AD5735
must stay within ±3.0 V of AGND for specified opera-
12-BIT
Figure 71. Voltage-to-Current Conversion Circuitry
DAC
OUT_x
can operate with either an external or internal
, and connect −V
A1
T1
R2
R
LV_x
SET
SENSE_x
A2
pin and the V
directly to AGND.
V
T2
BOOST_x
SENSE_x
R3
Data Sheet
I
OUT_x
and V
OUT_x
AD5735
OUT_x
pin.
SENSE_x

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