LTC1325 LINER [Linear Technology], LTC1325 Datasheet - Page 12

• Manufacturer Part Number: LTC1325
• Description: Microprocessor-Controlled Battery Management System
• Manufacturer: LINER [Linear Technology]

FUNCTIONAL DESCRIPTIO
LTC1325
Bit 3: Maximum Cell Voltage (FMCV)
The MCV bit indicates when the battery cell voltage has
exceeded the preset limit. The bit is set when V
greater than the voltage at the MCV pin.
Bit 4: End Discharge Voltage (FEDV)
The EDV bit indicates when the battery cell voltage has
dropped below an internally preset limit. The bit is set
when the battery cell voltage at the output of the voltage
divider V
Bit 5: High Temperature Fault (FHTF)
The HTF bit indicates when the battery temperature is too
high. Using a negative TC thermistor, the bit is set when
the voltage at the T
HTF pin.
Bit 6: Low Temperature Fault (FLTF)
The LTF bit indicates when the battery temperature is too
low. Using a negative TC thermistor, the bit is set when the
voltage at the T
LTF pin.
Bit 7: Timeout (t
The t
exceeded the preset limit. The bit is set when the internal
timer exceeds the limit set by the command bits TO0, TO1
and TO2.
12
FMCV
FEDV
FHTF
FLTF
U
0
1
0
1
0
1
0
1
OUT
CELL
bit indicates that the battery charging time has
is less than 900mV.
U
CONDITIONS
V
V
CONDITIONS
V
V
CONDITIONS
T
T
CONDITIONS
T
T
BAT
BAT
BAT
BAT
CELL
CELL
CELL
CELL
BAT
OUT
> V
< V
< V
> V
< V
> V
> 900mV
< 900mV
BAT
pin is greater than the voltage at the
)
HTF
HTF
LTF
LTF
MCV
MCV
pin is less than the voltage at the
U
CELL
is
Bit 8: Fail-Safe Occurred (FS)
The FS bit indicates that one of the fault detection circuits
halted the discharging or charging cycle. The bit is set
when an EDV, LTF, HTF, or t
discharge. During charging, the bit is set when a MCV,
LTF, HTF, or t
command word bit FSCLR.
DETAILED DESCRIPTION
Fault Conditions
The LTC1325 monitors the battery for fault conditions
before and during discharge and charge (see Figure 3).
They include: battery removed/present (BATP), battery
reversed/shorted (BATR), maximum cell voltage exceeded
T
FMCV
BATP
BATR
FS
FEDV
FHTF
OUT
FLTF
0
1
0
1
Figure 3. Fail-Safe or Fault Detection Circuitry
C1
C2
C3
C4
C5
C6
–
–
–
–
–
+
+
+
+
–
+
+
1.8V
CONDITIONS
No Timeout Has Occurred
Timeout Has Occurred
CONDITIONS
No Fail-Safe Has Occurred
Fail-Safe Has Occurred
OUT
V
+
–
DD
fault occurs. The bit is reset by the
REGULATOR
PROGRAMMABLE
BATTERY
DIVIDER
LINEAR
3.072V
REG
900mV
100mV
OUT
T
HTF
LTF
V
REG
BAT
BAT
fault occurs during
SENSE
MCV
V
DD
R
TRK
R1
R2
R3
R4
LTC1325 • F03
R
R
T
L