LTC1325 LINER [Linear Technology], LTC1325 Datasheet - Page 23

• Manufacturer Part Number: LTC1325
• Description: Microprocessor-Controlled Battery Management System
• Manufacturer: LINER [Linear Technology]

APPLICATIONS
TYPICAL
LABEL MNEMONIC OPERAND
CSLOW BCLR
LOOP1 TST
LOOP2 TST
LOOP3 TST
NOTE 1: NEEDED WHEN V
BATTERY VOLTAGE, V
NOTE 2: REGULATOR. OMIT THIS BLOCK AND SHORT
VDD TO V
NOTE 3: LEVEL SHIFTER. OMIT THIS BLOCK AND SHORT
PGATE TO P1 GATE WHEN V
LDAA
STAA
LDAA
STAA
LDX
LDAA
STAA
BPL
LDAA
STAA
BPL
LDAA
STAA
BPL
LDAA
STAA
(e.g. 8051)
DC
MPU
WHEN V
p1.4
p1.3
p1.2
APPLICATION
4.7 F
C
REG
DC
BAT
1 F
U
#$51
$1028
#$39
$1009
#$1000
$08,X,#$01
#$02
$102A
$1029
LOOP1
#$24
$102A
$1029
LOOP2
#$03
$102A
$1029
LOOP3
#$C0
$102A
NOTE 1
NOTE 2
C1
< 16V.
DC
> 16V.
+
DC
> 16V OR MAXIMUM
R1
R2
R3
R4
+
< 16V.
INFORMATION
U
220
1/2W
R11
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
COMMENTS
Write control byte to the SPCR
Setup Port D DDRD
Port D Bit 0 is CS
Load port base ADDR
Take CS low
Send Byte #1 (MSB) with
START bit
Check for SPI transfer
Send Byte 2
Check for SPI transfer
Send Byte 3
Check for SPI transfer
Send Byte 4
complete bit
complete bit
complete bit
D4
1N4744A
15V
REG
D
D
CS
CLK
LTF
MCV
HTF
GND
U
OUT
IN
W
LTC1325
FILTER
PGATE
SENSE
T
V
T
AMB
V
DIS
BAT
BAT
V
1 F
DD
IN
C
F
NOTE 4: ZENER TO CLAMP V
OMIT WHEN V
NOTE 5: EXTERNAL BATTERY DIVIDER. NEEDED WHEN
MAXIMUM BATTERY VOLTAGE, V
NOTE 6: V
Wide Voltage Battery Charger
NOTE 6
U
NOTE 1
NOTE 3
IN
IS AN UNCOMMITTED A/D CHANNEL.
DC
R13
THERM 2
R5
500pF
< 16V.
C3
THERM 1
D3
1N4740A
C2
0.1 F
C5
0.1 F
LABEL MNEMONIC OPERAND
LOOP4 TST
LOOP5 TST
LOOP6 TST
R7
BAT
TO BELOW V
BAT
R6
R12
100k
100
> 16V.
R8
BPL
LDAA
ANDA
STAA
LDAA
STAA
BPL
LDAA
STAA
LDAA
STAA
BPL
LDAA
STAA
BSET
BRA
+
V
100
C4
22 F
BAT
R14
DD
.
V
25V
DC
L1
62 H
P1
IRF9Z30
R
MBR320
SENSE
NOTE 5
NOTE 7
LOOP4
HIDATA
$102A
LOOP5
LODATA
$102A
LOOP6
STATUS
CSLOW
$1029
$102A
#$03
#$00
$1029
$102A
#$00
$1029
$102A
$08,X,#$01
NOTE 7: OPTIONAL DIODE TO PREVENT BATTERY
DRAIN WHEN THE CHARGING SUPPLY IS POWERED
DOWN (SEE SECTION 2, HARDWARE DESIGN
PROCEDURE).
1N5818
R9
R10
D1
IRF830
R
DIS
N1
COMMENTS
Check for SPI transfer
Get A/D high byte
Mask off unwanted bits
Store in user memory
Send dummy Byte #1
Check for SPI transfer
Get A/D low byte
Store in user memory
Send dummy Byte #2
Check for SPI transfer
Get STATUS byte
Store in user memory
Raise CS high
Loop for continuous readings
complete bit
complete bit
complete bit
R
TRK
D2
1N4744A
15V
NOTE 1
NOTE 4
LTC1325
23
1325 TA02