LTC1325 LINER [Linear Technology], LTC1325 Datasheet - Page 15

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LTC1325

Manufacturer Part Number
LTC1325
Description
Microprocessor-Controlled Battery Management System
Manufacturer
LINER [Linear Technology]
Datasheet

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FUNCTIONAL DESCRIPTIO
Gas Gauge Mode
Command: MOD1 = 1, MOD0 = 1, PS = 0
Status:
In the gas gauge mode, the average voltage across the
sense resistor can be measured to determine the average
battery load current. The output of the DAC is set to ground
and switches S1, S3 and S4 are closed. A1 is configured
as an inverting amplifier with R1 and R2 setting the gain
to – 4. The voltage across the sense resistor is filtered by
an RC circuit (R
the ADC.
The microprocessor can then accumulate the ADC mea-
surements and do a time average to determine the total
charge leaving the battery. The Sense pin voltage should
not be more negative than – 450mV to ensure linearity.
The R
external capacitor connected to the Filter pin. R
be longer than the measurement interval. With the serial
clock running at 100kHz, it take 380 s to shift in the
command word and shift out the ADC measurement and
status word.
Trickle Resistor
An external trickle resistor has several functions. First, it
provides a continuous trickle charge current for topping
off the battery and countering the effects of self-discharge.
Second, it can be used to condition a deeply discharged
battery for charging. The LTC1325 will not charge a battery
unless its cell voltage is above 100mV (BATR). Finally, the
resistor is required by the battery detect circuit to pull the
V
SERIAL INTERFACE
The LTC1325 communicates with microprocessors and
other external circuitry via a synchronous, half duplex,
4-wire serial interface. The clock CLK synchronizes the
data transfer with each bit being transmitted on the falling
edge and captured on the rising CLK edge in both transmit-
ting and receiving systems. The LTC1325 first receives
input data and then transmits back the A/D conversion
result and status word (half duplex). Because of the half
BAT
U
pin high when the battery is removed.
F
C
F
circuit consists of an internal 1k resistor and an
BATP = X, BATR = X, FMCV = X, FEDV = X,
FHTF = X, FLTF = X, t
U
F
, C
F
) amplified by A1, then converted by
OUT
= X
U
F
C
F
should
duplex operation, D
allowing transmission over just three wires: CS, CLK and
DATA (D
Data transfer is initiated by a falling chip select CS signal.
After CS falls, the LTC1325 looks for a start bit on D
start bit is the first “logical one” clocked into the D
after CS goes low. The LTC1325 will ignore all leading
zeros which precede this logical one. After the start bit is
received, the 21 other control bits are shifted into the D
pin to configure the LTC1325 and start a conversion. After
the last command bit, the D
for one clock period before it is taken low for one null bit.
Following the null bit, the conversion results and the 8
status bits are shifted out on the D
data exchange, CS should be brought high.
MSB-First/LSB-First (MSBF Control Bit)
The output data of the LTC1325 is programmed for MSB-
first or LSB-first sequence using the MSFB control bit.
When MSBF = 1, data will appear on D
format. This is followed by the 8 status bits. Logical zeros
will be filled in indefinitely following the last data bit to
accommodate longer word lengths required by some
microprocessors. When MSBF = 0, LSB-first data will
follow the MSB-first data. Regardless of the state of
MSBF, the status bits are always shifted out in the same
order (see Figure 2).
Accommodating Microprocessors with Different Word
Lengths
The LTC1325 will fill zeros indefinitely after the transmit-
ted data until CS is brought high. At that time D
disabled (three-stated). This makes for easy interfacing
to MPU serial ports with different transfer increments
including 4 bits (e.g., COP400) and 8 bits (e.g., SPI and
MICROWIRE/PLUS
modated by the correct positioning of the start bit in the
input word.
Operation with D
The LTC1325 can be operated with D
together. This eliminates one of the lines required to
MICROWIRE/PLUS is a trademark of National Semiconductor Corp.
IN
/D
OUT
).
IN
TM
and D
IN
). Any word length can be accom-
and D
OUT
OUT
OUT
Tied Together
pin remains in three-state
OUT
may be tied together
pin. At the end of the
IN
OUT
LTC1325
and D
in MSB-first
OUT
15
IN
IN
OUT
input
. The
tied
IN
is

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