LTC2171-14 LINER [Linear Technology], LTC2171-14 Datasheet - Page 12

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LTC2171-14

Manufacturer Part Number
LTC2171-14
Description
Quad 14-Bit, 125Msps ADC with Integrated Drivers
Manufacturer
LINER [Linear Technology]
Datasheet
LTM9012
pin FuncTions
PAR/SER (P10): Programming Mode Selection Pin. Con-
nect to ground to enable the serial programming mode. CS,
SCK, SDI and SDO become a serial interface that controls
the A/D operating modes. Connect to V
parallel programming mode where CS, SCK, SDI and SDO
become parallel logic inputs that control a reduced set of
the A/D operating modes. PAR/SER should be connected
directly to ground or the V
by a logic signal.
V
bypassed to ground with a 2.2μF ceramic capacitor, nomi-
nally 1.25V.
SENSE (N11): Reference Programming Pin. Connecting
SENSE to V
input range. Connecting SENSE to ground selects the
internal reference and a ±0.05V input range. An external
reference between 0.625V and 1.3V applied to SENSE
selects an input range of ±0.08 • V
nally bypassed to ground with a 0.1μF ceramic capacitor.
pin conFiguraTion Table
12
REF
M
A
B
C
D
G
H
K
N
P
Q
R
S
E
F
J
L
(P11): Reference Voltage Output. V
SHDN4
ENC–
ENC
GND
GND
GND
GND
GND
GND
V
GND
GND
GND
GND
GND
GND
GND
CC4
1
+
DD
selects the internal reference and a ±0.1V
CH4
D4A
D3A
GND
V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
CC3
2
+
SHDN3
CH4
D4A
D3A
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SDI
3
DD
+
+
of the part and not be driven
D4B
D3B
GND
GND
GND
GND
GND
GND
GND
V
GND
GND
GND
GND
V
FR
CS
CC4
4
DD
SENSE
DD
. SENSE is inter-
CH3
D4B
D3B
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SCK
V
FR
REF
5
DD
+
to enable the
+
+
+
is internally
CH3
V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
CC3
6
OVDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
7
LVDS Outputs
All pins in this section are differential LVDS outputs. The
output current level is programmable. There is an optional
internal 100Ω termination resistor between the pins of
each LVDS output pair.
OUT1A
Serial data outputs for Channel 1. In 1-lane output mode
only OUT1A
OUT2A
Serial data outputs for Channel 2. In 1-lane output mode
only OUT2A
OUT3A
rial data outputs for Channel 3. In 1-lane output mode
only OUT3A
OUT4A
rial data outputs for Channel 4. In 1-lane output mode
only OUT4A
FR
DCO
/FR
OVDD
OVDD
CH2
GND
V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
/DCO
CC2
8
+
+
/OUT1A
/OUT2A
/OUT3A
/OUT4A
(S4/S5): Frame Start Output.
+
SHDN2
(S9/S10): Data Clock Output.
/OUT1A
/OUT2A
/OUT3A
/OUT4A
CH2
D1A
D2A
DCO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SDO
V
9
DD
+
+
+
+
, OUT1B
, OUT2B
, OUT3B
, OUT4B
PAR/SER
+
+
+
+
DCO
D1A
D2A
GND
GND
GND
GND
GND
GND
GND
V
GND
GND
GND
GND
V
are used.
are used.
are used.
are used.
10
CC1
DD
+
+
+
/OUT1B
/OUT3B
/OUT4B
/OUT2B
SHDN1
SENSE
CH1
D1B
D2B
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
REF
11
+
+
+
+
+
(Q9/Q10, R11/R12):
(R2/R3, Q4/Q5): Se-
(S2/S3, R4/R5): Se-
(R9/R10, S11/S12):
CH1
D1B
D2B
V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
12
CC2
+
+
GND
GND
GND
GND
GND
GND
GND
V
GND
GND
GND
GND
GND
GND
GND
GND
GND
13
CC1
9012f

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