LTC2205-14 LINER [Linear Technology], LTC2205-14 Datasheet
LTC2205-14
Related parts for LTC2205-14
LTC2205-14 Summary of contents
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... The input range Input Range) of the ADC can be optimized with the PGA front end. P-P The LTC2205-14 is perfect for demanding communications applications, with AC performance that includes 78.3dB SNR and 98dB spurious free dynamic range (SFDR). Ultralow jitter of 90fs input frequencies with excellent noise performance. Maximum DC specs include ± ...
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... Digital Input Voltage .....................–0. Digital Output Voltage ................ –0.3V to (OV Power Dissipation ............................................ 2000mW Operating Temperature Range LTC2205-14C ........................................... 0°C to 70°C LTC2205-14I ........................................ –40°C to 85°C Storage Temperature Range .................. –65°C to 150°C Digital Output Supply Voltage (OV DD CONVERTER CHARACTERISTICS temperature range, otherwise specifi cations are at T ...
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... Input (1.5V Range, PGA = 1) 70MHz Input (2.25V Range, PGA = 0) 70MHz Input (1.5V Range, PGA = 1) 70MHz Input (1.5V Range, PGA = 1) 140MHz Input (2.25V Range, PGA = 0) 140MHz Input (1.5V Range, PGA = 1) 170MHz Input (2.25V Range, PGA = 0) 170MHz Input (1.5V Range, PGA = 1) LTC2205-14 MIN TYP MAX UNITS ● 1.5 to 2.25 V P-P ● ...
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... LTC2205-14 DYNAMIC ACCURACY otherwise specifi cations are 25° SYMBOL PARAMETER SFDR Spurious Free Dynamic Range th 4 Harmonic or Higher S/(N+D) Signal-to-Noise Plus Distortion Ratio SFDR Spurious Free Dynamic Range at –25dBFS Dither “OFF” SFDR Spurious Free Dynamic Range at –25dBFS Dither “ON” ...
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... 3.3V DD The denotes the specifi cations which apply over the full operating temperature ● = 25°C. (Note 4) CONDITIONS SHDN = V DD LTC2205-14 The denotes the specifi cations which apply over ● MIN TYP MAX 1.15 1.25 1.35 ± denotes the specifi cations which apply over the ● ...
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... LTC2205-14 TIMING CHARACTERISTICS range, otherwise specifi cations are SYMBOL PARAMETER f Sampling Frequency S t ENC Low Time L t ENC High Time H t Sample-and-Hold AP Aperture Delay t ENC to DATA Delay D t ENC to CLKOUT Delay C t DATA to CLKOUT Skew SKEW t DATA Access Time ...
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... G08 LTC2205-14 LTC2205-14: Grounded Input Histogram 250,000 200,000 150,000 100,000 50,000 0 8175 8176 8178 8179 8180 8177 CODE 220514 G03 LTC2205-14: 32K Point FFT, –25dBFS 5.1MHz, IN PGA = 0, DITH = 0 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 – ...
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... FREQUENCY (MHz) 220514 G14 LTC2205-14: 32K Point FFT, –25dBFS 70.1MHz, IN PGA = 1, DITH = 0 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 0 5 ...
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... FREQUENCY (MHz) 220514 G25 LTC2205-14: 32K Point FFT IN1 14.9MHz, –7dBFS 20.1MHz, IN2 –7dBFS, PGA = 0, DITH = 1 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 – ...
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... RAND = 1, DITH = 1 IN 120 110 100 –80 –40 –30 –20 –10 –70 –60 –50 INPUT LEVEL (dBFS) LTC2205-14: SFDR vs Input Level 140.1MHz, RAND = 1, IN DITH = 0 120 110 100 –80 –20 –10 –70 –60 – ...
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... DD 170 160 150 140 130 100 100 SAMPLE RATE (Msps) 220214 G42 LTC2205-14 LTC2205-14: SFDR and SNR vs Sample Rate 5.1MHz, IN RAND = 0, DITH = 0 110 SFDR 100 90 80 SNR 100 SAMPLE RATE (Msps) ...
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... LTC2205-14 PIN FUNCTIONS SENSE (Pin 1): Reference Mode Select and External Reference Input. Tie SENSE 2.5V bandgap reference. An external reference of 2.5V or 1.25V may be used; both reference values will set a full scale ADC range of 2.25V (PGA = 0). V (Pin 2): 1.25V Output. Optimum voltage for input com- CM mon mode ...
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... ENC Figure 1. Functional Block Diagram – – – LTC2205-14 FOURTH PIPELINED FIFTH PIPELINED ADC STAGE ADC STAGE CORRECTION LOGIC AND SHIFT REGISTER CONTROL OUTPUT LOGIC DRIVERS 220514 F01 OGND M0DE OE DITH – ...
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... LTC2205-14 OPERATION DYNAMIC PERFORMANCE Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [S/(N+D)] is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components at the ADC output. The output is band lim- ited to frequencies above DC to below half the sampling frequency ...
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... SAMPLE/HOLD OPERATION AND INPUT DRIVE Sample/Hold Operation Figure 2 shows an equivalent circuit for the LTC2205-14 CMOS differential sample and hold. The differential ana- log inputs are sampled directly onto sampling capacitors – ...
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... Transformer Coupled Circuits Figure 3 shows the LTC2205-14 being driven transformer with a center-tapped secondary. The secondary center tap is DC biased with V signal at its optimum DC level. Figure 3 shows a 1:1 turns ratio transformer. Other turns ratios can be used ...
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... Figure 4b. Using a Transmission Line Balun Transformer. Recommended for Input Frequencies from 250MHz to 500MHz LTC2205- LTC2205-14 – IN 220514 F03 V CM 2.2µF + 5Ω 0.1µF 25Ω 2.2pF T1 1:1 25Ω – 5Ω 2.2pF T1 = MA/COM ETC1-1-13 RESISTORS, CAPACITORS ARE 0402 PACKAGE SIZE EXCEPT 2.2µF LTC2205-14 22054 F04b 220514fa 17 ...
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... Reference Operation Figure 6 shows the LTC2205-14 reference circuitry con- sisting of a 2.5V bandgap reference, a programmable gain amplifi er and control circuit. The LTC2205-14 has three modes of reference operation: Internal Reference, 1.25V external reference or 2.5V external reference. To use the internal reference, tie the SENSE pin to V external reference, simply apply either a 1 ...
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... See the Typical Performance Characteristics section. Driving the Encode Inputs The noise performance of the LTC2205-14 can depend on the encode signal quality as much as on the analog input. The encode inputs are intended to be driven differentially, primarily for noise immunity from common mode noise sources ...
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... MODE pin must be connected to 1/3V or 2/3V using external resistors The lower limit of the LTC2205-14 sample rate is determined + by droop of the sample and hold circuits. The pipelined architecture of this ADC relies on storing analog signals on LTC2205-14 – small valued capacitors. Junction leakage will discharge the capacitors. The specifi ...
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... APPLICATIONS INFORMATION Data Format The LTC2205-14 parallel digital output can be selected for offset binary or 2’s complement format. The format is selected with the MODE pin. This pin has a four level logic input, centered at 0, 1/3V , 2/3V DD external resistor divider can be user to set the 1/3V and 2/3V logic levels ...
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... Figure 14. Functional Equivalent Block Diagram of Internal Dither Circuit 22 Internal Dither The LTC2205- 14-bit ADC with a very linear transfer function; however, at low input levels even slight imperfec- tions in the transfer function will result in unwanted tones. Small errors in the transfer function are usually a result of ADC element mismatches ...
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... Heat Transfer Most of the heat generated by the LTC2205-14 is trans- ferred from the die through the bottom-side exposed pad. For good electrical and thermal performance, the exposed pad must be soldered to a large grounded pad on the PC board critical that the exposed pad and all ground pins are connected to a ground plane of suffi ...
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... LTC2205-14 APPLICATIONS INFORMATION Ordering Guide: DEMO BOARD NUMBER PART NUMBER DC918A-A LTC2207CUK DC918A-B LTC2207CUK DC918A-C LTC2206CUK DC918A-D LTC2206CUK DC918A-E LTC2205CUK DC918A-F LTC2205CUK DC918A-G LTC2204CUK DC918A-H LTC2207CUK-14 DC918A-I LTC2207CUK-14 DC918A-J LTC2206CUK-14 DC918A-K LTC2206CUK-14 DC918A-L LTC2205CUK-14 See Web site for ordering details or contact local sales. ...
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... APPLICATIONS INFORMATION Silkscreen Top Inner Layer 2 LTC2205-14 Top Side Inner Layer 3 220514fa 25 ...
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... LTC2205-14 APPLICATIONS INFORMATION Inner Layer 4 Bottom Side 26 Inner Layer 5 Silkscreen Bottom 220514fa ...
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... Plastic QFN (7mm × 7mm) (Reference LTC DWG # 05-08-1704) 0.70 ±0.05 5.50 REF 6.10 ±0.05 7.50 ±0.05 (4 SIDES) PACKAGE OUTLINE 0.75 ± 0. 0.115 R = 0.10 TYP 5.15 ± 0.10 5.50 REF (4-SIDES) 0.200 REF 0.00 – 0.05 LTC2205-14 TYP 47 48 0.40 ± 0. PIN 1 CHAMFER C = 0.35 5.15 ± 0.10 (UK48) QFN 0406 REV C 0.25 ± 0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD 220514fa ...
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... LTC2205-14 RELATED PARTS PART NUMBER DESCRIPTION LTC1748 14-Bit, 80Msps 5V ADC LTC1750 14-Bit, 80Msps, 5V Wideband ADC LT1993-2 High Speed Differential Op Amp LT1994 Low Noise, Low Distortion Fully Differential Input/ Output Amplifi er/Driver LTC2202 16-Bit, 10Msps, 3.3V ADC, Lowest Noise LTC2203 16-Bit, 25Msps, 3.3V ADC, Lowest Noise LTC2204 16-Bit, 40Msps, 3 ...