LTC2205-14 LINER [Linear Technology], LTC2205-14 Datasheet - Page 22

no-image

LTC2205-14

Manufacturer Part Number
LTC2205-14
Description
14-Bit, 65Msps ADC
Manufacturer
LINER [Linear Technology]
Datasheet
LTC2205-14
APPLICATIONS INFORMATION
22
PC BOARD
Figure 13. Descrambling a Scrambled Digital Output
LTC2205-14
ANALOG
INPUT
AIN
AIN
CLKOUT
D13/D0
D12/D0
D2/D0
D1/D0
+
OF
D0
Figure 14. Functional Equivalent Block Diagram of Internal Dither Circuit
LTC2205-14
CLOCK/DUTY
ENC
CONTROL
AMP
S/H
CYCLE
+
FPGA
ENC
D13
D12
D2
D1
D0
PRECISION
PIPELINED
22054 F13
ADC CORE
14-BIT
DAC
dither DAC is driven by a long sequence pseudo-random
number generator; the random number fed to the dither
DAC is also subtracted from the ADC result. If the dither
DAC is precisely calibrated to the ADC, very little of the
dither signal will be seen at the output. The dither signal
that does leak through will appear as white noise. The dither
DAC is calibrated to result in less than 0.5dB elevation
in the noise fl oor of the ADC, as compared to the noise
fl oor with dither off.
Internal Dither
The LTC2205-14 is a 14-bit ADC with a very linear transfer
function; however, at low input levels even slight imperfec-
tions in the transfer function will result in unwanted tones.
Small errors in the transfer function are usually a result
of ADC element mismatches. An optional internal dither
mode can be enabled to randomize the input location on
the ADC transfer curve, resulting in improved SFDR for
low signal levels.
As shown in Figure 14, the output of the sample-and-hold
amplifi er is summed with the output of a dither DAC. The
SUMMATION
DIGITAL
PSEUDO-RANDOM
LOW = DITHER OFF
HIGH = DITHER ON
MULTIBIT DEEP
DITHER ENABLE
GENERATOR
NUMBER
DRIVERS
OUTPUT
DITH
220514 F14
CLKOUT
D13
OF
D0
220514fa

Related parts for LTC2205-14