LTC3615 LINER [Linear Technology], LTC3615 Datasheet - Page 15

• Manufacturer Part Number: LTC3615
• Description: Dual 4MHz, 3A Synchronous Step-Down DC/DC Converter
• Manufacturer: LINER [Linear Technology]

applicaTions inForMaTion
Operating Frequency
Selection of the operating frequency is a trade-off between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequencies improves efficiency by
reducing internal gate charge losses but requires larger
inductance values and/or capacitance to maintain low
output ripple voltage.
The operating frequency of the LTC3615 is determined by
an external resistor that is connected between pin R
and ground. The value of the resistor sets the ramp current
that is used to charge and discharge an internal timing
capacitor within the oscillator and can be calculated by
using the following equation:
Although frequencies as high as 4MHz are possible, the
minimum on-time of the LTC3615 imposes a minimum
limit on the operating duty cycle. The minimum on-time
R
T
=
4 10
•
f
OSC
11
3.3V
V
Ω
IN
Hz
R
4.7M
Figure 3. Soft-Start and Compensation for Channel 1 Externally Programmed,
Soft-Start and Compensation for Channel 2 Internally Programmed
SS
C
10nF
SS
47µF
R
15k
C
1000pF
47µF
C
C
1µF
10pF
R
T
R
T
, 200k
40.2k
SRLIM
/SYNC
RUN1
TRACK/SS1
PGOOD1
ITH1
R
SRLIM
PHASE
RUN2
TRACK/SS2
PGOOD2
ITH2
T
SV
/SYNC
IN
SGND
is typically 60ns, therefore, the minimum duty cycle is
equal to 60ns • 100% • f
Tying the R
operating frequency to 2.25MHz ±20%.
Frequency Synchronization
The LTC3615’s internal oscillator can be synchronized to
an external frequency by applying a square wave clock
signal to the R
top MOSFET turn-on of channel 1 is locked to the rising
edge of the external frequency source. The synchronization
frequency range is 400kHz to 4MHz. The internal slope
compensation is automatically adapted to the external
clock frequency.
In the signal path from the R
SW output, the LTC3615 is processing the external clock
frequency through an internal PLL.
After detecting an external clock on the first rising edge
of R
2.25MHz. The internal PLL then requires a certain number
(2 ) PV
LTC3615
T
IN1
/SYNC the PLL starts up with the internal default of
PGND
(2 ) PV
(2 ) SW1
(2 ) SW2
MODE
T
FB1
FB2
3615 F03
IN2
/SYNC pin to SV
T
/SYNC pin. During synchronization, the
0.47µH
0.47µH
OSC
R1
422k
R2
29.4k
R3
178k
R5
665k
R4
210k
(Hz)
IN
T
/SYNC clock input to the
sets the default internal
47µF
47µF
V
1.8V/3A
V
2.5V/3A
OUT1
OUT2
LTC3615

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