LTC3773EG-PBF LINER [Linear Technology], LTC3773EG-PBF Datasheet - Page 20

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LTC3773EG-PBF

Manufacturer Part Number
LTC3773EG-PBF
Description
Triple Output Synchronous 3-Phase DC/DC Controller with Up/Down Tracking
Manufacturer
LINER [Linear Technology]
Datasheet
APPLICATIONS INFORMATION
LTC3773
SENSE
The common mode input range of the current compara-
tor sense pins is from 0V to (1.1)V
operation is guaranteed throughout this range allowing
output voltage setting from 0.6V to 7.7V, depending upon
the voltage applied to V
is biased with internal resistors from an internal 2.4V
source as shown in Figure 1. This requires that current
either be sourced or sunk from the SENSE pins depending
on the regulator output voltage. If the output voltage is
below 2.4V, current will fl ow out of both SENSE pins to
the main output. The output can be easily preloaded by
the V
comparator’s negative input bias current. The maximum
current fl owing out of each pair of SENSE pins is:
Since V
can choose R1 in Figure 1 to have a maximum value to
absorb this current.
Regulating an output voltage of 1.8V, the maximum value
of R1 should be 30k. Note that for an output voltage above
2.4V, R1 has no maximum value necessary to absorb the
sense currents; however, R1 is still bounded by the V
feedback current.
Power Up from Shutdown
If the SDB1, SDB2 and SDB3 pins are forced below 0.4V,
the IC enters low current shutdown mode. Under this
condition, most of the internal circuit blocks, including
the reference, are disabled. The supply current drops to a
typical value of 20μA. Disconnecting the external applied
voltage source allows an internal 0.5μA current source to
pull up the SDBn pin. Once the voltage at any of the SDB
pins is above the shutdown threshold, the reference and
the internal biasing circuit wake up. When the voltage at
the SDBn pin goes above its power-up threshold, its driver
starts to toggle. The power-up thresholds for channels 1, 2
and 3 are set at 1.2V, 1.8V and 2.4V respectively. Adding a
20
I
R1
SENSE
OUT
(MAX)
+
FB
/SENSE
+
resistive divider to compensate for the current
is servoed to the 0.6V reference voltage, we
+I
= 30k
SENSE
Pins
2.4V – V
= 2 •
0.6V
CC
. A differential NPN input stage
2.4V – V
OUT
60k
for V
CC
OUT
. Continuous linear
OUT
< 2.4V
FB
Soft-Start/Tracking
When the voltage on the TRACK pin is less than the
internal 0.6V reference, the LTC3773 regulates the V
voltage to the TRACK pin voltage instead of 0.6V. After
the soft-start/tracking cycle, the TRACK pin voltage must
be higher than 0.8V; otherwise, the tracking circuit intro-
duces offset in the error amplifi er and the switcher output
will be regulated to a slightly lower potential. If tracking is
not required, a soft-start capacitor should be connected
to the TRACK pin to regulate the output startup slew rate.
small external capacitor larger than 100pF at the SDB pin
reduces the slew rate at the node, permitting the internal
circuit to settle before actual conversion begins.
LTC3773 can be easily confi gured to produce a sequential
power up/down supply. By adding an external capacitor
at the SDB pin; or by controlling the SDB input voltage,
channel 1 will be powered up fi rst, followed by channel
2 and sequentially channel 3. The channel turn on time
delay is determined by the SDB capacitor value. Figure 4
shows the sequential power up/down confi guration and
its waveform. The capacitor at the TRACK pins control
the individual channel power up slew rate.
0V TO 2V
POWER
DOWN
SOURCE
RAMP
10k
Figure 4. Sequential Power Up/Down
1MΩ
C
SLEW
0.1s/DIV
C
SS
SDB1
SDB2
SDB3
LTC3773
SDB
1V/DIV
2.5V
1.8V
1.2V
TRACK1
TRACK2
TRACK3
V
V
V
OUT1
OUT2
OUT3
1V/DIV
1V/DIV
1V/DIV
3773 F04
3773fb
FB

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