LTC3773EG-PBF LINER [Linear Technology], LTC3773EG-PBF Datasheet - Page 27

• Manufacturer Part Number: LTC3773EG-PBF
• Description: Triple Output Synchronous 3-Phase DC/DC Controller with Up/Down Tracking
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
5. Are the SENSE
6. Keep the switching nodes, SW, BOOST and TG away
7. Use a low impedance source such as a logic gate to
8. Minimize trace impedances of TG, BG and SW nets.
nected between the (+) terminal of C
a small decoupling capacitor should be placed across
this divider; as close as possible to the LTC3773 SGND
pin and away from any high current or high frequency
switching nodes.
each channel routed together with minimum PC trace
spacing? The fi lter capacitors between SENSE
SENSE
to the pins of the IC. Connect the SENSE
pins to the pads of the sense resistor as illustrated in
Figure 9.
from sensitive small-signal nodes (SENSE
V
traces should be routed away and separated from the IC
and the “quiet” side of the IC. Separate the high dV/dt
printed circuit traces from sensitive small-signal nodes
with ground traces or ground planes.
drive the PLLIN pin and keep the lead as short as
possible.
TG and SW must be routed in parallel with minimum
distance.
FB,
I
TH
–
). Ideally the SW, BOOST and TG printed circuit
for each channel should be as close as possible
–
and SENSE
+
printed circuit traces for
OUT
LTC3773
and SGND and
–
SENSE
SENSE
and SENSE
Figure 9. Kelvin Sensing R
+
, SENSE
–
+
+
1000pF
and
10Ω
10Ω
–
+
,
Figure 10 illustrates all branch currents in a three-phase
switching regulator. It becomes very clear after study-
ing the current waveforms why it is critical to keep the
high switching current paths to a small physical size.
High electric and magnetic fi elds will radiate from these
“loops” just as radio stations transmit signals. The output
capacitor ground should return to the negative terminal
of the input capacitor and not share a common ground
path with any switched current paths. The left half of the
circuit gives rise to the “noise” generated by a switching
regulator. The ground terminations of the synchronous
MOSFETs and Schottky diodes should return to the bot-
tom plate(s) of the input capacitor(s) with a short isolated
PC trace since very high switched currents are present.
A separate isolated path from the bottom plate(s) of the
input and output capacitor(s) should be used to tie in the IC
power ground pin (PGND). This technique keeps inherent
signals generated by high current pulses taking alternate
current paths that have fi nite impedances during the total
period of the switching regulator. External OPTI-LOOP
compensation allows overcompensation for PC layouts
which are not optimized but this is not the recommended
design procedure.
CAPACITOR
INDUCTOR
OUTPUT
SENSE
37773 F09
SENSE
RESISTOR
LTC3773
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