UPC1830GT NEC, UPC1830GT Datasheet - Page 16

• Manufacturer Part Number: UPC1830GT
• Description: FILTER-CONTAINING VIDEO CHROMA/ SYNCHRONIZING SIGNAL PROCESSING LSI COMPATIBLE WITH NTSC/PAL SYSTEM
• Manufacturer: NEC

5.3 Matrix Section
(1) Input signal
(2) Y, R-Y and B-Y input clamp circuit
16
(3) Amplification color control circuit
• Brightness input signal
• Color difference input signal
Clamps Y, R-Y and B-Y signals when the voltage of the clamp pulse input pin (pin 22) is 2.8 V or higher.
Input a clamp pulse to the clamp pulse input pin (pin 22) in synchronization with the burst section of an input signal
as shown in Figure 5-3.
In the application circuit example, adjust the position of the clamp pulse by DELAY ( PD4538B external variable
resistor: 10 k ) and the clamp pulse width by PD ( PD4538B external variable resistor: 10 k ).
Adjusts the amplitude of a color difference signal input to the R-Y input pin (pin 18) and B-Y input pin (pin 19) according
to the voltage of the color control pin (pin 20). This controls the color density on the screen.
When using a matrix, adjust the color density mainly using this color control and fix the voltage of the subcolor control
pin (pin 37) at 2 V (TYP.).
The control characteristic is shown in Figure 5-4.
After coupling by a capacitor (0.22 F), a brightness signal which has 1 V
pin (pin 16).
After coupling by a capacitor (0.22 F), 1 V
(pins 18 and 19).
clamp pulse
22-pin input
video input
Composite
Figure 5-3. 22-Pin Input Clamp Pulse Waveform
p-p
Burst signal
R-Y and B-Y signals are input to the R-Y and B-Y input pins
Clamp operates at 2.8 V or higher.
Video signal
p-p
of video part is input to the Y input
PC1830