Z80182 Zilog., Z80182 Datasheet - Page 105

• Manufacturer Part Number: Z80182
• Description: Z8018x Family MPU
• Manufacturer: Zilog.

DS971820600
Zilog
No.
16
17
18
Note: If FCR0-1
TSINT=3 CPU
Clock Cycles
/HRD
RD_RBR
/WR (MPU) RCVR
FIFO (First Byte
that reaches
Trigger Level)
/HRXRDY
/HWR
(Host)
THR
RD (MPU)
THR (Last
Byte Model)
/HTxRDY
Sym
tHR
TSTI
TIR
Parameter
Delay from /WR
(WR THR) to Reset
Interrupt
Delay from Stop to
Interrupt (THRE)
Delay from /RD
(RD IIR) to Reset
Interrupt (THRIE)
Figure 116 RCVR FIFO Bytes Other Than First
Table L. Interrupt Timing Transmitter FIFO
14
P R E L I M I N A R Y
20
Clock Cycles
2 MPU
19
Min
Z8L182
20 MHz
Clock Cycles
2.5 MPU
Max
75
Clock Cycles
2 MPU
Min
21
33 MHz
Z80182
Z
ILOG
Clock Cycles
I
NTELLIGENT
2.5 MPU
Max
75
Z80182/Z8L182
P
ERIPHERAL
3-105