MC68HC11E0 Motorola, MC68HC11E0 Datasheet - Page 38
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MC68HC11E0
Manufacturer Part Number
MC68HC11E0
Description
(MC68HC711E Series) M68HC11E Series Programming Reference Guide
Manufacturer
Motorola
Datasheet
1.MC68HC11E0.pdf
(60 pages)
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M68HC11ERG/AD
System Configuration Options (OPTION)
Pulse Accumulator Counter (PACNT)
38
CR[1:0]
0 0
0 1
1 0
1 1
E/2
Divide
E =
16
64
15
1
4
By
– 0 ms, + 32.8 ms
XTAL = 4.0 MHz
131.072 ms
32.768 ms
524.28 ms
1. Can be written only once in first 64 cycles out of reset in normal modes or at any time during
ADPU — Analog-to-Digital (A/D) Converter Power-Up
CSEL — Clock Select
IRQE — IRQ Select Edge-Sensitive Only
DLY — Enable Oscillator Startup Delay on Exit from Stop Mode
CME — Clock Monitor Enable
Bit 2 — Not implemented
CR[1:0] — COP Timer Rate Select
Timeout
1.0 MHz
2.098 s
Address:
Address:
special modes.
Reset:
Reset:
M68HC11E Series Programming Reference Guide
Always reads 0
Refer to the following table.
Read:
Write:
Read:
Write:
0 = A/D powered down
1 = A/D powered up
0 = A/D and EEPROM charge pumps use system E clock
1 = A/D and EEPROM charge pumps use internal RC oscillator
0 = Low level recognition
1 = Falling edge recognition
0 = No stabilization delay on exit from stop mode
1 = Stabilization delay enabled on exit from stop mode
0 = Clock monitor disabled; slow clocks can be used
1 = Slow or stopped clocks cause clock failure reset
$1039
ADPU
$1027
BIT 7
Bit 7
Bit 7
0
– 0 ms, + 16.4 ms
= Unimplemented
XTAL = 8.0 MHz
CSEL
16.384 ms
65.536 ms
262.14 ms
6
0
6
6
Timeout
2.0 MHz
1.049 s
IRQE
5
0
5
5
(1)
DLY
Unaffected by reset
XTAL = 12.0 MHz
– 0 ms, + 10.9 ms
4
1
4
4
(1)
43.691 ms
174.76 ms
699.05 ms
10.923 ms
Timeout
3.0 MHz
CME
3
0
3
3
2
0
2
2
XTAL = 16.0 MHz
– 0 ms, + 8.2 ms
CR1
Timeout
4.0 MHz
8.19 ms
32.8 ms
131 ms
524 ms
1
0
1
1
MOTOROLA
(1)
CR0
BIT 0
Bit 0
Bit 0
0
(1)