MC68HC11E0 Motorola, MC68HC11E0 Datasheet - Page 48
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MC68HC11E0
Manufacturer Part Number
MC68HC11E0
Description
(MC68HC711E Series) M68HC11E Series Programming Reference Guide
Manufacturer
Motorola
Datasheet
1.MC68HC11E0.pdf
(60 pages)
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M68HC11ERG/AD
Serial Peripheral Interface Status Register (SPSR)
Timer Count Register (TCNT)
48
SPIF — SPI Transfer Complete Flag
WCOL — Write Collision
Bit 5 — Unimplemented
MODF — Mode Fault (Mode fault terminates SPI operation)
Bits [3:0] — Unimplemented
In normal modes, TCNT is a read-only register.
Address: $1029
Address: $100E — High
Address: $100F — Low
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
M68HC11E Series Programming Reference Guide
This flag is set when an SPI transfer is complete (after eight SCK cycles in
a data transfer). Clear this flag by reading SPSR (with SPIF = 1), then
access SPDR.
This flag is set if the MCU tries to write data into SPDR while an SPI data
transfer is in progress. Clear this flag by reading SPSR (with WCOL = 1),
then access SPDR.
Always reads 0
MODF is set when SS is pulled low while MSTR = 1. Clear this flag by
reading SPCR with MODF set, then write to SPCR.
Always reads 0
0 = No SPI transfer complete or SPI transfer still in progress
1 = SPI transfer complete
0 = No write collision error
1 = SPDR written while SPI transfer in progress
0 = No mode fault error
1 = SS pulled low in master mode
BIT 15
BIT 7
SPIF
Bit 7
Bit 7
Bit 7
0
0
0
= Unimplemented
= Unimplemeted
WCOL
14
6
0
6
0
6
6
0
13
5
5
5
5
0
0
0
MODF
12
4
0
4
0
4
4
0
11
3
0
3
0
3
3
0
10
2
1
2
0
2
2
0
U
1
1
9
0
1
1
0
MOTOROLA
BIT 8
BIT 0
Bit 0
Bit 0
Bit 0
U
0
0