MBM29F400BC-55PF SPANSION [SPANSION], MBM29F400BC-55PF Datasheet - Page 20

• Manufacturer Part Number: MBM29F400BC-55PF
• Description: FLASH MEMORY CMOS 4M (512K x 8/256K x 16) BIT
• Manufacturer: SPANSION [SPANSION]

DQ
Toggle Bit II
*1 : These status flags apply when outputs are read from a sector that has been erase-suspended.
*2 : These status flags apply when outputs are read from the byte address of the non-erase suspended sector.
RY/BY
Ready/Busy
Program
Erase
Erase Suspend Read
(Erase-Suspended Sector)*
Erase Suspend Program
This toggle bit II, along with DQ
Algorithm or in Erase Suspend.
Successive reads from the erasing sector will cause DQ
device is in the erase-suspended-read mode, successive reads from the erase-suspended sector will cause DQ
to toggle. When the device is in the erase-suspended-program mode, successive reads from the byte address
of the non-erase suspended sector will indicate a logic “1” at the DQ
DQ
Program operation is in progress. The behavior of these two status bits, along with that of DQ
as follows:
For example, DQ
DQ
Furthermore, DQ
mode, DQ
The MBM29F400TC/BC provides a RY/BY open-drain output pin as a way to indicate to the host system that
the Embedded
either a program or erase operation. If the output is high, the device is ready to accept any read/write or erase
operation. When the RY/BY pin is low, the device will not accept any additional program or erase commands. If
the MBM29F400TC/BC is placed in an Erase Suspend mode, the RY/BY output will be high. Also, since this is
an open drain output, many RY/BY pins can be tied together in parallel with a pull up resistor to V
During programming, the RY/BY pin is driven low after the rising edge of the fourth write pulse. During an erase
operation, the RY/BY pin is driven low after the rising edge of the sixth write pulse. The RY/BY pin will indicate
a busy condition during the RESET pulse. Refer to “RY/BY Timing Diagram during Program/Erase Operations”
and “RESET/RY/BY Timing Diagram” in TIMING DIAGRAM for a detailed timing diagram.
Since this is an open-drain output, several RY/BY pins can be tied together in parallel with a pull-up resistor to V
2
MBM29F400TC
6
6
is different from DQ
does not). See also “Hardware Sequence Flags” and “Toggle Bit Algorithm” in FLOW CHART.
2
toggles if this bit is read from the erasing sector.
Mode
TM
2
2
Algorithms are either in progress or completed. If the output is low, the device is busy with
and DQ
can also be used to determine which sector is being erased. When the device is in the erase
2
1
6
in that DQ
can be used together to determine the erase-suspend-read mode (DQ
6
, can be used to determine whether the device is in the Embedded Erase
6
-55/-70-90
toggles only when the standard program or Erase, or Erase Suspend
DQ
DQ
DQ
0
1
7
*
7
7
2
2
/MBM29F400BC
to toggle during the Embedded Erase Algorithm. If the
toggles
toggles
toggles
2
DQ
bit.
1
6
-55/-70-90
7
toggles
, is summarized
toggles
DQ
2
1*
1
toggles while
CC
2
2
.
CC
.
2
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