S29PL-N SPANSION [SPANSION], S29PL-N Datasheet - Page 35

• Manufacturer Part Number: S29PL-N
• Description: 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
• Manufacturer: SPANSION [SPANSION]

November 23, 2005 S29PL-N_00_A4
7.4.5 Erase Suspend/Erase Resume Commands
When the Embedded Erase algorithm is complete, that bank returns to the read mode and ad-
dresses are no longer latched. The system can determine the status of the erase operation by
using DQ7 or DQ6/DQ2. See
Any commands written during the chip erase operation are ignored. However, note that a hard-
ware reset immediately terminates the erase operation. If that occurs, the chip erase command
sequence should be reinitiated once that bank has returned to reading array data, to ensure data
integrity.
The following is a C source code example of using the chip erase function. Refer to the Span-
sion Low Level Driver User’s Guide (available on
general information on Spansion Flash memory software development guidelines.
/* Example: Chip Erase Command */
/* Note: Cannot be suspended
The Erase Suspend command allows the system to interrupt a sector erase operation and then
read data from, or program data to, any sector not selected for erasure. The bank address is re-
quired when writing this command. This command is valid only during the sector erase operation,
including the minimum t
Erase Suspend command is ignored if written during the chip erase operation.
When the Erase Suspend command is written during the sector erase operation, the device re-
quires a maximum of t
when the Erase Suspend command is written during the sector erase time-out, the device imme-
diately terminates the time-out period and suspends the erase operation.
After the erase operation has been suspended, the bank enters the erase-suspend-read mode.
The system can read data from or program data to any sector not selected for erasure. (The de-
vice erase suspends all sectors selected for erasure.) Reading at any address within erase-
suspended sectors produces status information on DQ7-DQ0. The system can use DQ7, or DQ6,
and DQ2 together, to determine if a sector is actively erasing or is erase-suspended. Refer to
Table 7.18
Software Functions and Sample Code
*((UINT16 *)base_addr + 0x555) = 0x00AA;
*((UINT16 *)base_addr + 0x2AA) = 0x0055;
*((UINT16 *)base_addr + 0x555) = 0x0080;
*((UINT16 *)base_addr + 0x555) = 0x00AA;
*((UINT16 *)base_addr + 0x2AA) = 0x0055;
*((UINT16 *)base_addr + 0x000) = 0x0010;
Cycle
1
2
3
4
5
6
for information on these status bits.
Description
Chip Erase
Command
Command
P r e l i m i n a r y
Unlock
Unlock
Unlock
Unlock
Setup
ESL
S29PL-N MirrorBit™ Flash Family
SEA
(erase suspend latency) to suspend the erase operation. However,
*/
time-out period during the sector erase command sequence. The
Write Operation Status
(LLD Function = lld_ChipEraseCmd)
Table 7.10 Chip Erase
Operation
/* write unlock cycle 1
/* write unlock cycle 2
/* write setup command
/* write additional unlock cycle 1 */
/* write additional unlock cycle 2 */
/* write chip erase command
Write
Write
Write
Write
Write
Write
www.amd.com
for information on these status bits.
Word Address
Base + 2AAh
Base + 2AAh
Base + 555h
Base + 555h
Base + 555h
Base + 555h
and www.fujitsu.com) for
*/
*/
*/
*/
00AAh
00AAh
0055h
0080h
0055h
0010h
Data
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