ICS1893CK ICST [Integrated Circuit Systems], ICS1893CK Datasheet
ICS1893CK
Manufacturer Part Number
ICS1893CK
Description
3.3-V 10Base-T/100Base-TX Integrated PHYceive
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet
1.ICS1893CK.pdf
(126 pages)
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General
The ICS1893CF is a low-power, physical-layer device (PHY)
that supports the ISO/IEC 10Base-T and 100Base-TX
C a r r i e r - S e n s e M u l t i p l e A c c e s s / C o l l i s i o n D e t e c t i o n
(CSMA/CD) Ethernet standards, ISO/IEC 8802-3.
The ICS1893CF is intended for MII, Node applications that
require the Auto-MDIX feature that automatically corrects
crossover errors in plant wiring.
The ICS1893CF incorporates Digital-Signal Processing (DSP)
control in its Physical-Medium Dependent (PMD) sub layer. As
a result, it can transmit and receive data on unshielded
twisted-pair (UTP) category 5 cables with attenuation in
excess of 24 dB at 100MHz. With this ICS-patented
technology, the ICS1893CF can virtually eliminate errors from
killer packets.
The ICS1893CF provides a Serial-Management Interface for
exchanging command and status information with a
Sta t i o n - M a n a g e m e n t ( S TA) e n t i t y. T h e I CS 1 8 9 3 C F
Media-Dependent Interface (MDI) can be configured to
provide either half- or full-duplex operation at data rates of 10
Mb/s or 100Mb/s.
The ICS1893CF is available in a 300-mil 48-lead SSOP
pa c k ag e. T he I CS 18 9 3C F s h ar es t he s a m e p r o v en
performance circuitry with the ICS1893BF and is a pin-for-pin
replacement of the 1893BF.
Applications:
routers, DSL and cable modems, game machines, printers,
network connected appliances, and industrial equipment.
ICS1893CF, Rev. F, 03/01/07
ICS1893CF Block Diagram
Management
10/100 MII
Interface
Interface
MAC
MII
3.3-V 10Base-T/100Base-TX Integrated PHYceiver™
NIC cards, PC motherboards, switches,
Integrated Device Technology, Inc.
Extended
Interface
Register
MUX
Set
MII
ICS1893CF
IDT reserves the right to make changes in the device data identified in
this publication without further notice. IDT advises its customers to
obtain the latest version of all device data to verify that any information
being relied upon by the customer is current and accurate.
PCS
•
•
•
•
Synthesizer
Low-Jitter
Framer
CRS/COL
Detection
Parallel to Serial
4B/5B
Clock
Clock
PMA
•
•
•
•
100Base-T
10Base-T
Power
Clock Recovery
Link Monitor
Signal Detection
Error Detection
Features
•
•
•
•
•
•
•
•
•
•
•
•
Supports category 5 cables with attenuation in excess of
24dB at 100 MHz.
Single-chip, fully integrated PHY provides PCS, PMA, PMD,
and AUTONEG sub layers functions of IEEE standard.
10Base-T and 100Base-TX IEEE 8802.3 compliant
Single 3.3V power supply
Highly configurable, supports:
Low-power CMOS (typically 400 mW)
Power-Down mode typically 21mW
Clock and crystal supported
Fully integrated, DSP-based PMD includes:
Small footprint 48-pin 300 mil. SSOP package
Also available in small footprint 56-pin 8x8 MLF2 package
Available in Industrial Temp and Lead Free
– Media Independent Interface (MII)
– Auto-Negotiation with Parallel detection
– Node applications, managed or unmanaged
– 10M or 100M full and half-duplex modes
– Loopback mode for Diagnostic Functions
– Auto-MDI/MDIX crossover correction
– Adaptive equalization and baseline-wander correction
– Transmit wave shaping and stream cipher scrambler
– MLT-3 encoder and NRZ/NRZI encoder
TP_PMD
•
•
•
•
Configuration
and Status
LEDs and PHY
Address
MLT-3
Stream Cipher
Adaptive Equalizer
Baseline Wander
Correction
Document Type:
Document Stage:
Negotiation
Integrated
Switch
Auto-
Data Sheet
Rev. F Release
Modules and
Interface to
Connector
Magnetics
Twisted-
RJ45
Pair
Mar. 2007
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