ICS1893CK ICST [Integrated Circuit Systems], ICS1893CK Datasheet - Page 113

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ICS1893CK

Manufacturer Part Number
ICS1893CK
Description
3.3-V 10Base-T/100Base-TX Integrated PHYceive
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet

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9.5.11 100M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)
ICS1893CF, Rev. F, 03/01/07
Table 9-18
half-duplex transmission. The time periods consist of timings of signals on the following pins:
Figure 9-12
Table 9-18. 100M MII Carrier Assertion/De-Assertion (Half-Duplex Transmission Only)
Figure 9-12. 100M MII Carrier Assertion/De-Assertion Timing Diagram
TXEN
TXCLK
CRS
Period
Time
TXEN
TXCLK
CRS
t1
t2
ICS1893CF Data Sheet Rev. F - Release
TXEN Sampled Asserted to CRS Assert
TXEN De-Asserted to CRS De-Asserted
lists the significant time periods for the 100M MII carrier assertion/de-assertion during
shows the timing diagram for the time periods.
(Half-Duplex Transmission Only)
t1
Copyright © 2007, Integrated Device Technology, Inc.
Parameter
All rights reserved.
113
t2
Chapter 9 DC and AC Operating Conditions
Condi-
tions
Min.
0
0
Typ.
3
3
Max.
4
4
Bit times
Bit times
Mar. 2007
Units

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