ICS1893CK ICST [Integrated Circuit Systems], ICS1893CK Datasheet - Page 78

• Manufacturer Part Number: ICS1893CK
• Description: 3.3-V 10Base-T/100Base-TX Integrated PHYceive
• Manufacturer: ICST [Integrated Circuit Systems]

7.13.2 Polarity Reversed (bit 18.14)
7.13.3 ICS Reserved (bits 18.13:6)
7.13.4 Jabber Inhibit (bit 18.5)
7.13.5 ICS Reserved (bit 18.4)
7.13.6 Auto Polarity Inhibit (bit 18.3)
7.13.7 SQE Test Inhibit (bit 18.2)
ICS1893CF, Rev. F, 03/01/07
The Polarity Reversed bit is used to inform an STA whether the ICS1893CF has detected that the signals
on the Twisted-Pair Receive Pins (TP_RXP and TP_RXN) are reversed. When the signal polarity is:
•
•
Note:
See
The Jabber Inhibit bit allows an STA to disable Jabber Detection. When an STA sets this bit to:
•
•
See
The Auto Polarity Inhibit bit allows an STA to prevent the automatic correction of a polarity reversal on the
Twisted-Pair Receive pins (TP_RXP and TP_RXN). If an STA sets this bit to logic:
•
•
Note:
The SQE Test Inhibit bit allows an STA to prevent the generation of the Signal Quality Error pulse. When an
STA sets this bit to logic:
•
•
The SQE Test provides the ability to verify that the Collision Logic is active and functional. A 10Base-T SQE
test is performed by pulsing the Collision signal for a short time after each packet transmission completes,
that is, after TXEN goes inactive.
Note:
1. The SQE Test is automatically inhibited in full-duplex and repeater modes, thereby disabling the
2. This bit is a control bit and not a status bit. Therefore, it is not updated to indicate this automatic
Correct, the ICS1893CF sets bit 18.14 to a logic zero.
Reversed, the ICS1893CF sets bit 18.14 to logic one.
Zero, the ICS1893CF enables 10Base-T Jabber checking.
One, the ICS1893CF disables its check for a Jabber condition during data transmission.
Zero (the default), the ICS1893CF automatically corrects a polarity reversal on the Twisted-Pair Receive
pins.
One, the ICS1893CF either disables or inhibits the automatic correction of reversed Twisted-Pair
Receive pins.
Zero, the ICS1893CF enables its SQE Test generation.
One, the ICS1893CF disables its SQE Test generation.
functionality of this bit.
inhibiting of the SQE test in full-duplex mode or repeater mode.
ICS1893CF Data Sheet - Release
Section 7.11.2, “ICS Reserved (bits
Section 7.11.2, “ICS Reserved (bits
The ICS1893CF can detect this situation and perform all its operations normally, independent of
the reversal.
The ICS1893CF will not complete the Auto-MDIX function for an inverted polarity cable. This
is a rare event with modern manufactured cables. Full Auto-Negotiation and Auto Polarity
Correction will complete when the Auto-MDIX function is disabled. Software control for the
Auto-MDIX function is available in MDIO Register 19 Bits 9:8.
Copyright © 2007, Integrated Device Technology, Inc.
16.14:11)”, the text for which also applies here.
16.14:11)”, the text for which also applies here.
All rights reserved.
78
Chapter 7 Management Register Set
Mar. 2007