MT48H16M32LFCJ-75 MICRON [Micron Technology], MT48H16M32LFCJ-75 Datasheet - Page 16
MT48H16M32LFCJ-75
Manufacturer Part Number
MT48H16M32LFCJ-75
Description
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Manufacturer
MICRON [Micron Technology]
Datasheet
1.MT48H16M32LFCJ-75.pdf
(73 pages)
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Extended Mode Register (EMR)
Figure 7:
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
CAS Latency
Notes:
The EMR controls the functions beyond those controlled by the mode register. These
additional functions are special features of the mobile device that helps reduce overall
system power consumption. They include temperature-compensated self refresh
(TCSR) control, partial-array self refresh (PASR), and output drive strength.
The EMR is programmed via the MODE REGISTER SET command (BA1 = 1, BA0 = 0) and
retains the stored information until it is programmed again or the device loses power.
1. Each READ command may be to any bank. DQM is LOW.
2. For CL = 2, DQM should be taken LOW at READ command. For CL = 3, DQM should be taken
COMMAND
COMMAND
LOW one cycle after the READ command.
CLK
CLK
DQ
DQ
READ
READ
T0
T0
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
CL = 2
NOP
NOP
T1
T1
16
t
LZ
CL = 3
t AC
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T2
NOP
T2
NOP
t
LZ
D
t OH
OUT
t AC
T3
T3
NOP
D
t OH
OUT
DON’T CARE
UNDEFINED
©2005 Micron Technology, Inc. All rights reserved.
Register Definition
T4
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