CY7C135 CYPRESS [Cypress Semiconductor], CY7C135 Datasheet
CY7C135
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CY7C135 Summary of contents
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... L Cypress Semiconductor Corporation Document #: 38-06038 Rev. *B Functional Description The CY7C135 and CY7C1342 are high-speed CMOS dual-port static RAMs. The CY7C1342 includes semaphores that provide a means to allocate portions of the dual-port RAM or any shared resource. Two ports are provided permitting in- dependent, asynchronous access for reads and writes to any location in memory ...
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... I/O 7R 1342– I 1342–4 Description CY7C135 7C135–55 7C1342–55 55 160 30 Page ...
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... Com’l 220 190 Ind. Com’ Ind. Com’l 130 120 Ind. Com’ Ind. Com’l 125 115 Ind. CY7C135 CY7C1342 ± 10% 5V ± 10% 7C135–25 7C1342–25 Max Uni Min 2.4 V 0.4 V 2.2 V 0.8 V µA –10 +10 µ ...
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... Ind. 110 – 0.2V, Com’l 15 Ind. 30 Com’l 90 Ind. 100 Max OUTPUT 1.4V TH (c) Three-State Delay (Load 3) 1342–6 90% 10% 1342–8 ≤ CY7C135 CY7C1342 7C135–55 Unit 2.4 V 0.4 V 2.2 V 0.8 V µA –10 +10 µA –10 +10 160 mA 180 100 ...
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... HZCE LZCE HZOE CY7C135 CY7C1342 7C135–35 7C135–55 7C1342–35 7C1342–55 Unit ...
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... Document #: 38-06038 Rev. *B Either Port Address Access Either Port CE/OE Access t ACE t DOE t LZOE t wc MATCH t PWE MATCH and CY7C135 CY7C1342 DATA VALID t HZCE t HZOE DATA VALID VALID t DDD t WDD 1342–9 1342–10 VALID 1342–11 ...
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... AW t PWE t HZOE HIGH IMPEDANCE [19, 21 SCE PWE t HZWE or (t PWE CY7C135 CY7C1342 DATA VALID t LZOE DATA VALID t LZWE HIGH IMPEDANCE + allow the I/O drivers to turn off and data to be placed on the ...
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... Document #: 38-06038 Rev. *B [22 SCE t SD DATA VALID PWE t SWRD t SOP WRITE CYCLE [23,24,25] MATCH t SPS MATCH = CE = HIGH CY7C1342 OHA VALID ADDRESS t ACE t SOP DATA VALID OUT t DOE READ CYCLE CY7C135 1342–14 1342–15 Page ...
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... Architecture The CY7C135 consists of an array of 4K words of 8 bits each of dual-port RAM cells, I/O and address lines, and control sig- nals (CE, OE, R/W). Two semaphore control pins exist for the CY7C1342 (SEM ). L/R Functional Description Write Operation Data must be set up for a duration R/W in order to guarantee a valid write. Since there is no ...
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... OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 100 5. 25° 125 0.0 1.0 2.0 OUTPUT VOLTAGE (V) NORMALIZED 25° 0.5V IN 1.0 0.75 0. 800 1000 CYCLE FREQUENCY (MHz) CY7C135 25°C A 3.0 4.0 5.0 3.0 4.0 5.0 vs.CYCLE TIME 40 50 Page ...
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... Dual-Port SRAM Speed (ns) Ordering Code 15 CY7C135–15JC 20 CY7C135–20JC 25 CY7C135–25JC CY7C135–25JI 35 CY7C135–35JC CY7C135–35JI 55 CY7C135–55JC CY7C135–55JI 4K x8 Dual-Port SRAM with Semaphores Speed (ns) Ordering Code 15 CY7C1342–15JC 20 CY7C1342–20JC 25 CY7C1342–25JC CY7C1342–25JI 35 CY7C1342–35JC CY7C1342–35JI 55 CY7C1342– ...
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... Document History Page Document Title: CY7C135/CY7C1342 Dual Port Static RAM and Dual Port Static RAM w/Semaphores Document Number: 38-06038 Issue REV. ECN NO. Date ** 110181 10/21/01 *A 122288 12/27/02 *B 236763 SEE ECN Document #: 38-06038 Rev. *B Orig. of Change Description of Change SZV Change from Spec number: 38-00541 to 38-06038 ...