AMD-766AC AMD [Advanced Micro Devices], AMD-766AC Datasheet - Page 38

• Manufacturer Part Number: AMD-766AC
• Description: Peripheral Bus Controller
• Manufacturer: AMD [Advanced Micro Devices]

23167B – March 2001
C0A4B: IOAPIC Configuration Register
Configuration space; function 0; offset: 4Bh Default: 00h Read-write.
7:5
Reserved
APICEN. IOAPIC enable. 0=Accesses to the IOAPIC memory space are routed to the ISA/LPC bus and the
interrupt message bus is not used. 1=The IOAPIC is enabled, accesses to the IOAPIC memory space are not reflected
on the ISA/LPC bus, and the interrupt message bus is used to transmit IOAPIC interrupts.
SMI2IOA. SMI to IOAPIC redirection register 23. 1=The SMI output of the power management logic is routed
through redirection register 23 of the IOAPIC; the SMI# pin is never asserted. 0=IRQ23 of the IOAPIC is driven
with the output of the GPIO17 input path (regardless as to the state of PMD1) and the SMI# pin is controlled by the
IC.
SCI2IOA. SCI to IOAPIC redirection register 22. 1=The SCI output of the power management logic is routed
through redirection register 22 of the IOAPIC; C3A42[SCISEL] disabled. 0=IRQ22 of the IOAPIC is driven with
the output of the GPIO16 input path (regardless as to the state of PMD0); C3A42[SCISEL] functions normally.
APICCKS. APIC clock select. Selects the source and frequency of the PICCLK as follows:
C0A51: LPC Bus Decode Register 0
Configuration space; function 0; offset: 51h Default: 00h Read-write.
7
ACPI
PRANGE and ECP. Parallel port range and ECP enable. Specifies which parallel port IO range to route to the LPC
bus as follows:
PRANGE
00b
01b
10b
11b
* Note: Port 279h is read-only for LPC. Writes are forwarded to the ISA bus.
FDC1. Floppy drive controller 1. 1=IO ports 3F0h - 3F5h and 3F7h is are routed to LPC. 0=These accesses are
routed to the ISA bus.
FDC2. Floppy drive controller 2. 1=IO ports 370h – 375h and 377h is are routed to LPC. 0=These accesses are
routed to the ISA bus.
KBDC. Keyboard controller. 1=When USB keyboard emulation is not enabled via HceControl[0] (offset 100h in
USBxxx space), IO ports 60h and 64h are routed to LPC. 0=When USB keyboard emulation is not enabled, IO ports
60h and 64h are routed to ISA. If USB keyboard emulation is enabled, these cycles are routed to the USB block.
ACPI. ACPI controller. 1= IO ports 62h and 66h are routed to LPC. 0=These accesses are routed to the ISA bus.
APICCKS[1:0] Frequency
00b
01b
10b
11b
6
KBDC
ECP = 0
3BC - 3BFh
378 - 37Fh
278 - 27Fh*
None
PCLK divided by 4 (8.3 MHz. max)
PCLK divided by 2 (16.7 MHz. max)
PCLK (33.3 MHz. max)
Unknown. Note: In this mode, the external
clock source is required to be 33.3 MHz or less.
5
FDC2
4:3
APICCKS[1:0]
4
FDC1
Preliminary Information
ECP = 1
3BC - 3BFh and 7BC - 7BFh
378 - 37Fh and 778 - 77Fh
278 - 27Fh and 678 - 67Fh*
None
3
ECP
AMD-766
Source
The IC drives PICCLK.
The IC drives PICCLK.
The IC drives PICCLK.
PICCLK is driven by an external component.
2
SCI2IOA
2
Reserved
TM
Peripheral Bus Controller Data Sheet
1
SMI2IOA
1:0
PRANGE
0
APICEN
38