CY7C1355C-100BZC CYPRESS [Cypress Semiconductor], CY7C1355C-100BZC Datasheet - Page 15

• Manufacturer Part Number: CY7C1355C-100BZC
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-05688 Rev. *D
Document History Page
Document Title: CY7C1379C 9-Mbit (256K x 32) Flow-through SRAM with NoBL™ Architecture
Document Number: 38-05688
REV.
*C
*D
*A
*B
**
ECN NO. Issue Date
286269
320834
377095
408725
501828
See ECN
See ECN
See ECN
See ECN
See ECN
Orig. of
Change
RXU
VKN
PCI
PCI
PCI
New data sheet
Address expansion pins/balls in the pinouts for all packages are modified as
per JEDEC standard
Added 133 MHz in the Ordering Information table
Changed Θ
6.13 °C/W respectively
Changed Θ
3.0 °C/W respectively
Modified V
Corrected IDD, tCDV, tCH, tDOH and tCL for 100MHz to 180 mA, 7.5 ns, 4
ns, 2 ns and 4 ns respectively
Changed Snooze to Sleep in the ZZ Mode Electrical Characteristics and truth
table
Added Industrial operating range
Added BZC package in the Ordering Information table
Updated Ordering Information Table
Changed I
Modified test condition in note# 10 from V
Changed address of Cypress Semiconductor Corporation on Page# 1 from
“3901 North First Street” to “198 Champion Court”
Changed three-state to tri-state
Converted from preliminary to final
Modified “Input Load” to “Input Leakage Current except ZZ and MODE” in
the Electrical Characteristics Table
Replaced Package Name column with Package Diagram in the Ordering
Information table
Added the Maximum Rating for Supply Voltage on V
Updated the Ordering Information table.
SB2
OL,
JA
JA
and Θ
and Θ
V
from 30 to 40 mA
OH
test conditions
JC
JC
for TQFP Package from 25 and 9 °C/W to 29.41 and
for FBGA Package from 27 and 6 °C/W to 16.8 and
Description of Change
DDQ
< V
DD
DDQ
to V
CY7C1379C
DDQ
Relative to GND
Page 15 of 15
< V
DD