AD9518-0A-PCBZ AD [Analog Devices], AD9518-0A-PCBZ Datasheet - Page 53

• Manufacturer Part Number: AD9518-0A-PCBZ
• Description: 6-Output Clock Generator
• Manufacturer: AD [Analog Devices]

Data Sheet
Reg.
Addr.
(Hex)
0x01C
0x01D
0x01F
Bits
7
6
5
[4:3]
2
1
0
4
3
2
1
0
6
5
4
3
2
Name
Disable switchover
deglitch
Select REF2
Use REF_SEL pin
Reserved
REF2 power-on
REF1 power-on
Differential
reference
PLL status register
disable
LD pin comparator
enable
Holdover enable
External holdover
control
Holdover enable
VCO cal finished
Holdover active
REF2 selected
VCO frequency >
threshold
REF2 frequency >
threshold
Description
Disables or enables the switchover deglitch circuit.
0: enables switchover deglitch circuit (default).
1: disables switchover deglitch circuit.
If Register 0x01C, Bit 5 = 0b, selects reference for PLL.
0: selects REF1 (default).
1: selects REF2.
Sets method of PLL reference selection.
0: uses Register 0x01C, Bit 6 (default).
1: uses REF_SEL pin.
Reserved (default: 00b).
This bit turns the REF2 power on.
0: REF2 power off (default).
1: REF2 power on.
This bit turns the REF1 power on.
0: REF1 power off (default).
1: REF1 power on.
Selects the PLL reference mode: differential or single-ended. Single-ended must be selected for the automatic
switchover between REF1 and REF2 to work.
0: single-ended reference mode (default).
1: differential reference mode.
Disables the PLL status register readback.
0: PLL status register enable (default).
1: PLL status register disable.
Enables the LD pin voltage comparator. This function is used with the LD pin current source lock detect mode. When
in the internal (automatic) holdover mode, this function enables the use of the voltage on the LD pin to determine if
the PLL was previously in a locked state (see Figure 38). Otherwise, this function can be used with the REFMON and
STATUS pins to monitor the voltage on this pin.
0: disables LD pin comparator; internal/automatic holdover controller treats this pin as true (high) (default).
1: enables LD pin comparator.
Along with Bit 0, enables the holdover function. Automatic holdover must be disabled during VCO calibration.
0: holdover disabled (default).
1: holdover enabled.
Enables the external hold control through the SYNC pin. (This disables the internal holdover mode.)
0: automatic holdover mode; holdover controlled by automatic holdover circuit (default).
1: external holdover mode; holdover controlled by SYNC pin.
Along with Bit 2, enables the holdover function. Automatic holdover must be disabled during VCO calibration.
0: holdover disabled (default).
1: holdover enabled.
Read-only register. Indicates status of the VCO calibration.
0: VCO calibration not finished.
1: VCO calibration finished.
Read-only register. Indicates if the part is in the holdover state (see Figure 38). This is not the same as holdover enabled.
0: not in holdover.
1: holdover state active.
Read-only register. Indicates which PLL reference is selected as the input to the PLL.
0: REF1 selected (or differential reference if in differential mode).
1: REF2 selected.
Read-only register. Indicates if the VCO frequency is greater than the threshold (see Table 15: REF1, REF2, and VCO
frequency status monitor).
0: VCO frequency is less than the threshold.
1: VCO frequency is greater than the threshold.
Read-only register. Indicates if the frequency of the signal at REF2 is greater than the threshold frequency set by
Register 0x1A, Bit 6.
0: REF2 frequency is less than threshold frequency.
1: REF2 frequency is greater than threshold frequency.
Rev. C | Page 53 of 64
AD9518-0