W83194R-58 WINBOND [Winbond], W83194R-58 Datasheet - Page 4

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W83194R-58

Manufacturer Part Number
W83194R-58
Description
100 MHZ AGP CLOCK FOR VIA CHIPSET
Manufacturer
WINBOND [Winbond]
Datasheet
5.3 I
5.4 Fixed Frequency Outputs
5.5 Power Pins
SDATA
SDCLK
REF0/ CPU3.3#_2.5
REF1/*SD_SEL#
24MHz/ *MODE
48MHz/ *FS0
2
SYMBOL
SYMBOL
C Control Interface
SYMBOL
V
V
V
DD
V
DD
DD
Vss
DD
q2b
q2
q3
6, 14, 19, 30, 36 Power supply for SDRAM, PCICLK and 48/24 MHz outputs.
3, 9, 16, 22, 27,
PIN
33, 39, 45
PIN
23
24
46
25
26
2
PIN
42
48
1
I/O
I/O Serial data of I
I/O
I/O Internal 250 K
I/O Internal 250 K
I/O Internal 250 K
I/O Internal 250 K
IN Serial clock of I
Latched input for CPU3.3#_2.5 at initial power up.
Reference clock during normal operation.
Latched high - V
Latched low - V
Latched input at Power On selects either CPU(SDSEL = 1)
or AGP(SD_SEL = 0) frequencies for SDRAM clock
outputs.
Latched input for MODE at initial power up. 24 MHz output
for super I/O during normal operation.
Latched input for FS0 at initial power up for H/W selecting
the output frequency of CPU, SDRAM and PCI clocks. 48
MHz output for USB during normal operation.
Power supply for Ref [0:1] crystal and core logic.
Power supply for AGP1 and REF1 output, either 2.5V or
3.3V.
Power supply for CPUCLK[0:3], either 2.5V or 3.3V.
Circuit Ground.
- 4 -
Preliminary W83194R-37/-58
2
C 2-wire control interface
2
DD
C 2-wire control interface
pull-up.
DD
pull-up.
pull-up.
pull-up.
q2b = 3.3V
q2b = 2.5V
FUNCTION
FUNCTION
FUNCTION

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