AD9915 AD [Analog Devices], AD9915 Datasheet - Page 28

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AD9915

Manufacturer Part Number
AD9915
Description
2.5 GSPS Direct Digital Synthesizer with 12-Bit DAC
Manufacturer
AD [Analog Devices]
Datasheet

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PROGRAMMING AND FUNCTION PINS
The
port is for programming the internal registers of the device in
either serial mode or parallel mode as well as allowing for direct
modulation control of frequency (FTW), phase (POW), and
amplitude (AMP).The state of the external function pins (F0 to
Table 10. Parallel Port Configurations
Function Pins,
F[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
1
2
3
4
5
AD9915
Pin 31 to Pin 28.
Pin 68 to Pin 72, Pin 75 to 77.
Pin 78 to Pin 81, Pin 87, Pin 88, Pin 1, Pin 2.
Pin 3 to Pin 5, Pin 8 to Pin 12.
Pin 13 to Pin 15, Pin 18 to Pin 22.
AD9915
1
is equipped with a 32-bit parallel port. The 32-bit
Mode Description
Parallel programming mode
Serial programming mode
Full 32 bits of direct frequency
tuning word control. MSB and LSB
aligned to parallel port pins
Full 32 bits of direct frequency
tuning word control with different
parallel port pin assignments
Full 16 bits of direct phase offset
control and full 12 bits of direct
amplitude control
Full 12 bits of direct amplitude
control and full 16 bits of direct
phase offset control
24 bits of partial FTW control and
8 bits of partial amplitude control
24 bits of partial FTW control and
8 bits of partial phase offset control
24 bits of partial FTW control and
8 bits of partial amplitude control
24 bits of partial FTW control and
8 bits of partial phase offset control
24 bits of partial FTW control and
8 bits of partial amplitude control
24 bits of partial FTW control and
8 bits of partial phase offset control
24 bits of partial FTW control and
8 bits of partial amplitude control
24 bits of partial FTW control and
8 bits of partial phase offset control
Bits[31:24]
Data[15:8]
(optional)
Not used
FTW[31:24]
FTW[15:8]
POW[15:8]
AMP[11:8]
FTW[31:24]
FTW[31:24]
FTW[31:24]
FTW[31:24]
FTW[23:16]
FTW[23:16]
FTW[23:16]
FTW[23:16]
Not used
Not used
Rev. A | Page 28 of 48
2
F3) determines how the 32-bit parallel port is configured.
Pin 28 to Pin 31 are the function pins. Refer to Table 10 for
possible configurations.
Note that the OSK enable bit, CFR1[8], must be set to enable
amplitude control, as shown in Table 10.
Bits[23:16]
Data[7:0]
Not used
FTW[23:16]
FTW[7:0]
POW[7:0]
AMP[7:0]
FTW[23:16]
FTW[23:16]
FTW[23:16]
FTW[23:16]
FTW[15:8]
FTW[15:8]
FTW[15:8]
FTW[15:8]
Not used
Not used
32-Bit Parallel Port Pin Assignment
3
Bits[15:8]
Address[7:0]
Not used
FTW[15:8]
FTW[31:24]
AMP[11:8]
POW[15:8]
FTW[15:8]
FTW[15:8]
FTW[15:8]
FTW[15:8]
FTW[7:0]
FTW[7:0]
FTW[7:0]
FTW[7:0]
Not used
Not used
4
Bits[7:0]
Used to control writes, reads, and
8-bit or 16-bit data-word. See the
Parallel Programming section for
details.
Used to control SCLK, SDIO,
SDO, CS, and SYNCIO. See the
Serial Programming section for
details.
FTW[7:0]
FTW[23:16]
AMP[7:0]
POW[7:0]
AMP[15:8]
POW[15:8]
AMP[7:0]
POW[7:0]
AMP[15:8]
POW[15:8]
AMP[7:0]
POW[7:0]
Not used
Not used
5
Data Sheet

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