DP8570 NSC [National Semiconductor], DP8570 Datasheet - Page 2

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DP8570

Manufacturer Part Number
DP8570
Description
Timer Clock Peripheral (TCP)
Manufacturer
NSC [National Semiconductor]
Datasheet

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Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (V
DC Input Voltage (V
DC Output Voltage (V
Storage Temperature Range
Power Dissipation (PD)
Lead Temperature (Soldering 10 sec )
DC Electrical Characteristics
V
Note 1 Absolute Maximum Ratings are those values beyond which damage to the device may occur
Note 2 Unless otherwise specified all voltages are referenced to ground
Note 3 For F
Note 4 This parameter (V
Note 5 This specification tests I
Note 6 This specification tests I
Note 7 This specification is tested with both the timers and OSC IN driven by a signal generator Contents of the Test Register
configured as buffered oscillator out and MFO T1 INTR are configured as open drain
Note 8 This specification is tested with both the timers off and only OSC IN is driven by a signal generator Contents of the Test Register
pin is not configured as buffered oscillator out
Symbol
V
V
V
V
I
I
I
I
I
I
I
IN
OZ
LKG
CC
CC
BB
BLK
CC
IH
IL
OH
OL
e
Single Supply Mode Data retention voltage is 2 2V min
In single Supply Mode (Power connected to V
5V
OSC
g
10% V
e
High Level Input Voltage
(Note 4)
Low Level Input Voltage
High Level Output Voltage
(Excluding OSC OUT)
Low Level Output Voltage
(Excluding OSC OUT)
Input Current (Except OSC IN)
Output TRI-STATE Current
Output High Leakage Current
T1 MFO INTR Pins
Quiescent Supply Current
(Note 7)
Quiescent Supply Current
(Single Supply Mode)
(Note 7)
Standby Mode Battery
Supply Current
(Note 8)
Battery Supply Leakage
4 194304 or 4 9152 MHz V
CC
IN
)
IH
BB
OUT
)
) is not tested on all pins at the same time
e
)
CC
CC
Parameter
3V V
with all power fail circuitry disabled by setting D7 of Interrupt Control Register 1 to 0
with all power fail circuitry enabled by setting D7 of Interrupt Control Register 1 to 1
PFAIL l
b
b
BB
0 5V to V
0 5V to V
b
minimum
V
CC
b
65 C to
IH
0 5V to
pin) 4 5V
C
(Notes 1
L
CC
CC
e
e
a
500 mW
2 8V In battery backed mode V
a
a
a
100 pF (unless otherwise specified)
s
150 C
260 C
Any Inputs Except OSC IN
OSC IN with External Clock
All Inputs Except OSC IN
OSC IN with External Clock
I
I
I
I
V
V
V
Outputs Open Drain
F
V
V
V
F
V
V
V
V
F
F
V
OSC OUT
Other Pins
F
F
2 2V
Other Pins at GND
V
V
7 0V
0 5V
0 5V
OUT
OUT
OUT
OUT
V
OSC
OSC
OSC
OSC
OSC
OSC
IN
OUT
OUT
IN
IN
IN
IN
IN
BB
IN
CC
CC
CC
CC s
2)
e
e
e
e
e
e
e
e
e
e
e
s
e b
e b
e
e
e
e
e
e
e
e
e
e
V
V
V
V
V
V
V
5 5V
GND
GND
GND V
5 5V V
V
Conditions
20 A
4 0 mA
CC
CC
CC
IH
CC
IH
CC
2
32 768 kHz
4 194304 MHz or
4 9152 MHz
32 768 kHz
4 9152 MHz or
4 194304 MHz
32 768 kHz
4 9152 MHz or
4 194304 MHz
V
V
BB s
20 A
4 0 mA
CC
CC
or V
or V
e
e
or GND
or GND (Note 5)
or GND (Note 6)
or GND (Note 6)
or GND
Operation Conditions
Supply Voltage (V
Supply Voltage (V
DC Input or Output Voltage
Operation Temperature (T
Electr-Static Discharge Rating TBD
Transistor Count
Typical Values
Open Circuit
or GND
or GND
GND
IL
IL
BB
4 0V
BB
(V
JA
JA
(Note 6)
(Note 6)
IN
e
e
DIP
PLCC
V
2 2V
4 0V
OUT
BB s
)
V
CC
CC
BB
b
) (Note 3)
) (Note 3)
0 4V
V
V
BB
CC
Min
b
A
2 0
3 5
)
b
b
5
0 1
0 1
e
b
Min
4 5
2 2
0 0
00(H) the MFO pin is not
40
g
g
g
Max
0 25
12 0
260
400
Socket
Socket
0 8
0 1
0 1
1 0
7 5
1 5
20
80
10
e
Board
Board
8
1 0
5 0
5 0
V
00(H) and the MFO
15 200
CC
a
Max
V
5 5
b
CC
1
85
e
e
e
e
0 4
45 C W
50 C W
77 C W
85 C W
Units
mA
mA
mA
mA
mA
V
V
Unit
V
V
V
V
V
V
kV
A
A
A
A
A
A
A
A
A
V
V
V
C

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