AD9253-125EBZ AD [Analog Devices], AD9253-125EBZ Datasheet - Page 7

• Manufacturer Part Number: AD9253-125EBZ
• Description: Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
• Manufacturer: AD [Analog Devices]

Data Sheet
Timing Diagrams
Refer to the Memory Map Register Descriptions section and Table 21 for SPI register settings.
BYTEWISE
BITWISE
MODE
MODE
DDR
SDR
VIN±x
FCO–
DCO–
DCO+
DCO–
DCO+
FCO–
FCO+
FCO+
CLK–
CLK+
D0–A
D0+A
D1–A
D1+A
D0–A
D0+A
D1–A
D1+A
N – 1
t
A
t
EH
t
t
FCO
PD
t
CPD
Figure 2. 16-Bit DDR/SDR, Two-Lane, 1× Frame Mode (Default)
N – 17
N – 17
N – 17
N – 17
MSB
MSB
D12
D05
t
N – 17
N – 17
N – 17
N – 17
t
FRAME
D10
D11
D04
D12
EL
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N – 17
N – 17
N – 17
N – 17
D08
D09
D03
D11
N – 17
N – 17
N – 17
N – 17
D06
D07
D02
D10
N
t
N – 17
N – 17
N – 17
N – 17
DATA
D04
D05
D01
D09
N – 17
N – 17
N – 17
N – 17
LSB
D02
D03
D08
N – 17
N – 17
N – 17
N – 17
LSB
D01
D07
0
N – 17
N – 17
N – 17
N – 17
D06
0
0
0
t
LD
N – 16
N – 16
N – 16
N – 16
MSB
MSB
D12
D05
N – 16
N – 16
N – 16
N – 16
D10
D11
D04
D12
N – 16
N – 16
N – 16
N – 16
D08
D09
D03
D11
N – 16
N – 16
N – 16
N – 16
D06
D07
D02
D10
N + 1
N – 16
N – 16
N – 16
N – 16
D04
D05
D01
D09
N – 16
N – 16
N – 16
N – 16
D02
D03
LSB
D08
AD9253
N – 16
N – 16
N – 16
N – 16
LSB
D01
D07
0
N – 16
N – 16
N – 16
N – 16
D06
0
0
0