CS5112YDWF24 ONSEMI [ON Semiconductor], CS5112YDWF24 Datasheet
CS5112YDWF24
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CS5112YDWF24 Summary of contents
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... V FB2 SELECT COMP ORDERING INFORMATION Device Package CS5112YDWF24 SOIC−24 CS5112YDWF24G SOIC−24 (Pb−Free) CS5112YDWFR24 SOIC−24 1000/Tape & Reel CS5112YDWFR24G SOIC−24 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D ...
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V FB1 Multiplexer V FB2 SELECT COMP I BIAS Oscillator C OSC V REG Bandgap Reference C DELAY WDI MAXIMUM RATINGS Logic Inputs/Outputs (ENABLE, SELECT, WDI, RESET) V LIN REG: V Peak Transient Voltage SW C ...
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V ≤ V ELECTRICAL CHARACTERISTICS = 0.1 mF; unless otherwise specified 64.9 kW 390 pF, C BIAS OSC COMP Characteristic General 6.6 V ≤ Off Current IN 6.6 V ≤ ...
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ELECTRICAL CHARACTERISTICS = 0.1 mF; unless otherwise specified 64.9 kW 390 pF, C BIAS OSC COMP Characteristic Switcher Section (continued) = 5.0 V with 50 W Load, V Switcher Max Duty Cycle V SW Current Sense ...
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TYPICAL PERFORMANCE CHARACTERISTICS 4.5 4.0 3 (mA) LIN Figure 2. 5.0 V Regulator Bias Current vs. Load Current 1.4 1.2 1.0 0.8 0.6 0.4 0 0.5 1.0 I (A) SW Figure 4. Switch ...
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V REG I Bandgap BIAS Reference R BIAS 64 Delay WDI Figure 6. Block Diagram of 5.0 V Linear Regulator Portion of the CS5112 5.0 V LINEAR REGULATOR The 5.0 V linear regulator consists of an error amplifier, ...
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Duty V REG Cycle RESET WDI V LIN t POR A: Watchdog waiting for low−going transition on WDI B: RESET stays low for t time WDI Figure 8. Timing Diagram When WDI Fails to Appear Within the Preset Time ...
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V LIN COMP I BIAS R BIAS 64 OSC Oscillator Switcher Error COMP Amplifier Figure 11. Block Diagram of the 1.4 A Current Mode Control Switching Regulator Portion of the OUT SAT ...
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DESIGN PROCEDURE FOR BOOST TOPOLOGY This section outlines a procedure for designing a boost switching power supply operating in the discontinuous mode. Step 1 Determine the output power required by the load. P OUT + I OUT V OUT Step ...
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The V /V transfer function has a pole at: OUT (pR LOAD C OUT ) and a zero due to the output capacitor’s ESR at (2pESR(C OUT )) Since the error ...
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Select > 2.0 V OUT Select < 0.8 V OUT OUT ( 100 (1) 946 ...
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LINEAR REGULATOR OUTPUT CURRENT VS. INPUT VOLTAGE 100 55°C Max Total Power = 1. (V) REG Figure 17. The Shaded Area Shows ...
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D 24X 0.010 (0.25 −T− SEATING PLANE G 22X PACKAGE THERMAL DATA R qJC R qJA ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to ...