LM12434CIWM NSC [National Semiconductor], LM12434CIWM Datasheet

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LM12434CIWM

Manufacturer Part Number
LM12434CIWM
Description
Sign Data Acquisition System with Serial I/O and Self-Calibration
Manufacturer
NSC [National Semiconductor]
Datasheet
C 1995 National Semiconductor Corporation
LM12434 LM12 L 438 12-Bit
System with Serial I O and Self-Calibration
General Description
The LM12434 and LM12 L 438 are highly integrated Data
Acquisition Systems Operating on 3V to 5V they combine a
fully-differential self-calibrating (correcting linearity and zero
errors) 13-bit (12-bit
(ADC) and sample-and-hold (S H) with extensive analog
and digital functionality Up to 32 consecutive conversions
using two’s complement format can be stored in an internal
32-word (16-bit wide) FIFO data buffer An internal 8-word
instruction RAM can store the conversion sequence for up
to eight acquisitions through the LM12 L 438’s eight-input
multiplexer The LM12434 has a four-channel multiplexer a
differential multiplexer output and a differential S H input
The LM12434 and LM12 L 438 can also operate with 8-bit
a
that compares an input signal against two programmable
limits
Acquisition times and conversion rates are programmable
through the use of internal clock-driven timers The differen-
tial reference voltage inputs can be externally driven for ab-
solute or ratiometric operation
All registers RAM and FIFO are directly accessible through
the high speed and flexible serial I O interface bus The
serial interface bus is user selectable to interface with the
following protocols with zero glue logic MICROWIRE
PLUS
Serial Port (Mode 0) I
Port
An evaluation kit for demonstrating the LM12434 and
LM12 L 438 is available
TRI-STATE is a registered trademark of National Semiconductor Corporation
MICROWIRE PLUS
Windows is a registered trademark of Microsoft Corporation
Connection Diagrams
Pin names in ( ) apply to the LM12434
sign resolution and in a supervisory ‘‘watchdog’’ mode
TM
Order Number LM12434CIV LM12438CIV or
Motorola’s SPI QSPI Hitachi’s SCI 8051 Family’s
TM
See NS Package Number V28A
is a trademark of National Semiconductor Corporation
28-Pin PLCC Package
LM12L438CIV
a
2
C and the TMS320 Family’s Serial
sign) analog-to-digital converter
TL H 11879
TL H 11879 – 1
a
Key Specifications
f
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Applications
Y
Y
Y
Y
Y
CLK
Resolution
13-bit conversion time
9-bit conversion time
13-bit Through-put rate
Comparison time (‘‘watchdog’’ mode)
Serial Clock
Integral Linearity Error
V
Power dissipation
Stand-by mode
power dissipation
Supply voltage LM12L438
Three operating modes 12-bit
and ‘‘watchdog’’ comparison mode
Single-ended or differential inputs
Built-in Sample-and-Hold
Instruction RAM and event sequencer
8-channel (LM12 L 438) or 4-channel (LM12434)
multiplexer
32-word conversion FIFO
Programmable acquisition times and conversion rates
Self-calibration and diagnostic mode
Power down output for system power management
Read while convert capability for maximum through-put
rate
Data Logging
Portable Instrumentation
Process Control
Energy Management
Robotics
Order Number LM12434CIWM LM12438CIWM or
IN
Sign Data Acquisition
e
range
8 MHz L f
See NS Package Number M28B
28-Pin Wide Body SO Package
LM12434 8
140k samples s 105k sample s (min)
CLK
LM12L438CIWM
e
6 MHz
12-bit
10 MHz 6 MHz (max)
45 mW 20 mW (max)
25 W 16 5 W (typ)
a
a
5 5 s 7 3 s (max)
2 6 s 3 5 s (max)
1 4 s 1 8 s (max)
sign or 8-bit
sign 8-bit
RRD-B30M85 Printed in U S A
g
GND to V
1 LSB (max)
3 3V
TL H 11879 – 2
5V
July 1995
a
a
g
g
10%
10%
sign
sign
A
a

Related parts for LM12434CIWM

LM12434CIWM Summary of contents

Page 1

... Y Portable Instrumentation Y Process Control Y Energy Management Y Robotics Y 28-Pin Wide Body SO Package TL H 11879 – 1 Order Number LM12434CIWM LM12438CIWM or LM12L438CIWM See NS Package Number M28B July 1995 12-bit sign or 8-bit sign (max (max (max) ...

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FUNCTIONAL DIAGRAMS 2 0 ELECTRICAL SPECIFICATIONS 2 1 Ratings Absolute Maximum Ratings Operating Ratings 2 2 Performance Characteristics Converter Static Characteristics Converter Dynamic Characteristics 2 2 ...

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... Functional Diagrams INTERFACE MODESEL1 Standard 0 8051 TMS320 1 Internal pull-up Ordering Information (LM12434) Part Number Package Type LM12434CIV 28-Pin PLCC LM12434CIWM 28-Pin Wide Body SO LM12434 MODESEL2 SAD0 SAD1 SAD2 1 FSR FSX DX NSC Package Number ...

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Functional Diagrams (Continued) INTERFACE MODESEL1 Standard 0 8051 TMS320 1 Internal pull-up Ordering Information (LM12 L 438) Part Number Package Type LM12438CIV 28-Pin PLCC LM12L438CIV LM12438CIWM 28-Pin Wide Body SO LM12L438CIWM LM12438 Eval ...

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... Sign and ‘‘Watchdog’’ Mode a Total Unadjusted Error 8-Bit Sign and ‘‘Watchdog’’ Mode a Resolution with No Missing Codes Operating Ratings (Notes 1 Temperature Range 2) LM12434CIV LM12 L 438CIV LM12434CIWM LM12 L 438CIWM Supply Voltage ...

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Electrical Specifications Converter Static Characteristics The following specifications apply to the LM12434 and LM12 L 438 for AGND DGND MHz 6 ...

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Electrical Specifications Converter Dynamic Characteristics The following specifications apply only to the LM12434 and LM12438 for AGND DGND REF throughput rate 133 3 kHz R ...

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Electrical Specifications Converter Dynamic Characteristics The following specifications apply only to the LM12434 and LM12438 for AGND DGND REF throughput rate 133 3 kHz R ...

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Electrical Specifications Characteristics The following specifications apply to the LM12434 and LM12 L 438 for V AGND DGND 096V REF a otherwise specified Boldface limits ...

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Electrical Specifications 2 3 DIGITAL SWITCHING CHARACTERISTICS The following specifications apply to the LM12434 and LM12 L 438 for AGND DGND Boldface limits apply for T T ...

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Electrical Specifications 2 3 DIGITAL SWITCHING CHARACTERISTICS The following specifications apply to the LM12434 and LM12 L 438 for AGND DGND Boldface limits apply for T T ...

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Electrical Specifications 2 3 DIGITAL SWITCHING CHARACTERISTICS The following specifications apply to the LM12434 and LM12 L 438 for AGND DGND Boldface limits apply for T T ...

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Electrical Specifications 2 3 DIGITAL SWITCHING CHARACTERISTICS The following specifications apply to the LM12434 and LM12 L 438 for AGND DGND Boldface limits apply for T T ...

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Electrical Specifications 2 4 NOTES ON SPECIFICATIONS Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is functional but do not guarantee specific performance ...

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Electrical Characteristics FIGURE 1 Output Digital Code vs the Operating Input Voltage Range (General Case) FIGURE 2 Output Digital Code vs the Operating Input Voltage Range for V 4 096V e REF 11879 – 6 ...

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Electrical Characteristics FIGURE 3 V FIGURE 4 V (Continued) Operating Range (General Case) REF Operating Range for REF 11879 – 11879 – 9 ...

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Electrical Characteristics FIGURE 5b Simplified Error Curve vs Output Code without Auto-Calibration or Auto-Zero Cycles (Continued) FIGURE 5a Transfer Characteristic 11879– 11879– 11 ...

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Electrical Characteristics FIGURE 5c Simplified Error Curve vs Output Code after Auto-Calibration Cycle FIGURE 6 Offset or Zero Error Voltage (Continued 11879 – 11879– 13 ...

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Typical Performance Characteristics The following curves apply for 12-bit sign mode after auto-calibration unless otherwise specified The performance for 8-bit a sign and ‘‘watchdog’’ modes is equal to or better than shown (Note 9) Linearity Error Change vs ...

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Typical Performance Characteristics The following curves apply for 12-bit sign mode after auto-calibration unless otherwise specified The performance for 8-bit a sign and ‘‘watchdog’’ modes is equal to or better than shown (Note 9) Analog Supply Current vs ...

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Typical Performance Characteristics The following curves apply for 12-bit sign mode after auto-calibration unless otherwise specified Sampling Rate 133 3 ...

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Typical Performance Characteristics The following curves apply for 12-bit sign mode after auto-calibration unless otherwise specified Sampling Rate ...

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Pin Descriptions Pin Number Pin Name PLCC SO Pkg Pkg 1 7 DGND Digital ground This is the device’s digital supply ground connection It should be connected through a low resistance and low inductance ground return to the ...

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Pin Descriptions (Continued) TABLE I LM12 L 438 Pin Description (Continued) Pin Number Pin Name PLCC SO Pkg Pkg Serial interface input Serial interface input 22 28 MODESEL2 Serial mode selection inputs ...

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Operational Information 6 1 FUNCTIONAL DESCRIPTION The LM12434 and LM12 L 438 are multi-functional Data Acquisition Systems that include a fully differential 12-bit- plus-sign self-calibrating analog-to-digital converter (ADC) with a two’s-complement output format an 8-channel (LM12 L 438) ...

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Operational Information FIGURE 7 The LM12 L 438 and LM12434 Functional Block Diagram (Programming Model) (Continued) (a) The LM12 L 438 (b) The LM12434 11879 – 11879 – 28 ...

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Operational Information Acquisition Time The LM12434 and LM12 L 438’s internal designed to operate at its minimum acquisition time (1 125 1 5 for a 12-bit sign conversion) when the source imped- a ance R ...

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Operational Information Instruction RAM Limits 2 ADD 0000 e ADD 0001 e ADD 0010 e ADD 0011 e ADD 0100 e ADD 0101 e ADD 0110 e ADD 0111 e RP RAM Pointer e ADD ...

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Operational Information 6 2 INTERNAL USER-ACCESSIBLE REGISTERS Figure 8 shows the LM12434 and LM12 L 438 internal user accessible registers Figure 9 shows the bit assignment for each register All the registers are accessible through the serial interface ...

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Operational Information Purpose Type D15 D14 D13 D12 Instruction RAM Acquisition to (RAM Pointer 00 Instruction RAM ...

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Operational Information CONFIGURATION REGISTER (Read Write) D15 D14 D13 D12 D11 D10 Don’t Care Diag Test D0 Start 0 stops the instruction execution 1 starts the instruction execution D1 Reset When set to 1 resets Start bit also ...

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Operational Information INSTRUCTION RAM (Read Write) (Continued) Limits 1 2 D15 D14 D13 D12 D11 D10 Don’t Care D7 –D0 Limit 8-bit limit value D8 Sign Sign of limit value 0 Positive High Limit Low ...

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Operational Information FIFO REGISTER (Read only) D15 D14 D13 D12 D11 D10 Instruction Number Sign or Extended Sign D11 –D0 Conversion Result For 12-bit sign 12-bit result value a For 8-bit sign D11–D4 result value D3– ...

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Operational Information Bits 12 –15 store the user-programmable acquisition time The Sequencer keeps the internal the acquisition mode for a fixed number of clock cycles (nine clock cycles for 12-bit sign conversions and two clock ...

Page 35

Operational Information TABLE IV LM12434 Input Channel Selection through Input Multiplexer Non-Inverting Input Input Channel to Be Channel Selection Bits Connected to MUX in Instruction Register Non-Inverting Output (MUXOUT 000 001 010 011 1XX TABLE ...

Page 36

Operational Information Configuration Register The Configuration register is a 16-bit control register with read write capability It acts as the LM12434’s and LM12 L 438’s ‘‘control panel’’ holding global information as well as start stop ...

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Operational Information they are not masked (by the Interrupt Enable register) The Interrupt Status register is then read to determine which of the seven interrupts has been issued The Interrupt Status register must be cleared by reading it ...

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Operational Information Bit 6 no interrupt is associated with this bit Don’t care con- dition Bit 7 is set to ‘‘1’’ when the DAS returns from standby to active mode (see Note 22) Bits 8 –10 hold the ...

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Operational Information 6 3 INSTRUCTION SEQUENCER The Sequencer uses a 3-bit counter (Instruction Pointer or IP) to retrieve the programmable conversion instructions stored in the Instruction RAM The counter is reset to 000 during chip reset or if ...

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Operational Information FIGURE 10 Sequencer Logic Flow Chart (IP (Continued) Instruction Pointer 11879– 19 ...

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Digital Interface In order to read from or write to the registers of the LM12434 and LM12 L 438 a very flexible serial synchro- nous interface is provided Communication between the LM12434 and LM12 L 438 and microcontrollers ...

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Digital Interface (Continued) In both cases the data transfer is insensitive to idle state of the SCLK SCLK can stay at either logic level high or low when not clocking (see Figure 11 ) Data transfer in this ...

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Digital Interface (Continued) Idle State of SCLK 0 Data Stable at Rising Edge and Shifted at Falling Edge of the SCLK e Idle State of SCLK 1 Data Stable at Rising Edge and Shifted at Falling Edge of ...

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Digital Interface (Continued) Idle State of SCLK 0 Data Stable at Falling Edge and Shifted at Rising Edge of the SCLK e Idle State of SCLK 1 Data Stable at Falling Edge and Shifted at Rising Edge of ...

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Digital Interface (Continued) Idle State of SCLK 0 Data Stable at Rising Edge and Shifted at Falling Edge of the SCLK e Idle State of SCLK 1 Data Stable at Rising Edge and Shifted at Falling Edge of ...

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Digital Interface (Continued) Idle State of SCLK 0 Data Stable at Falling Edge and Shifted at Rising Edge of the SCLK e Idle State of SCLK 1 Data Stable at Falling Edge and Shifted at Rising Edge of ...

Page 47

Digital Interface (Continued) 47 ...

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Digital Interface (Continued Examples of Interfacing to the HPC’s MICROWIRE PLUS and 68HC11’s SPI Note Other device pins are not shown FIGURE 12a LM12434 and LM12 L 438 Standard Mode Interface to the HPC’s MICROWIRE ...

Page 49

Digital Interface (Continued) HPC Assembly Code Example 11879 – 56 ...

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Digital Interface (Continued) HPC Assembly Code Example (Continued 11879 – 57 ...

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Digital Interface (Continued) HPC Assembly Code Example (Continued 11879 – 58 ...

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Digital Interface (Continued) HPC Assembly Code Example (Continued) 68HC11 Assembly Code Example 11879 – 11879 – 85 ...

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Digital Interface (Continued) 68HC11 Assembly Code Example (Continued 11879– 86 ...

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Digital Interface (Continued) 68HC11 Assembly Code Example (Continued 11879 – 87 ...

Page 55

Digital Interface (Continued 8051 INTERFACE MODE The 8051 interface mode is designed to work directly with the 8051 family of microcontrollers’ mode 0 serial interface This interface mode is a simple shift register type of serial ...

Page 56

Digital Interface (Continued) Burst read cycle A burst read cycle starts the same way as a single read cycle but the B bit in the command byte is set to one indicating a burst read cycle Following the ...

Page 57

Digital Interface (Continued) 57 ...

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Digital Interface (Continued Example of Interfacing to the 8051 FIGURE 14 LM12434 and LM12 L 438 in the 8051 Interface Mode 8051 Assembly Code Example 11879 – 11879 – ...

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Digital Interface (Continued) 8051 Assembly Code Example (Continued 11879 – 90 ...

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Digital Interface (Continued) 8051 Assembly Code Example (Continued 11879– 91 ...

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Digital Interface (Continued) 8051 Assembly Code Example (Continued 11879 – 96 ...

Page 62

Digital Interface (Continued TMS320 INTERFACE MODE The TMS320 interface mode is designed to work directly with the serial interface port of the TMS320C3x and TMS320C5x families of digital signal processors This inter- face uses five lines ...

Page 63

Digital Interface (Continued) Burst read cycle A burst read cycle starts the same way as a single read cycle but the B bit in the command packet is set to one indicating a burst read cycle After the ...

Page 64

Digital Interface (Continued) 64 ...

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Digital Interface (Continued Example of Interfacing to the TMS320C3x Note Other device pins are not shown FIGURE 16 LM12434 and LM12 L 438 in the TMS320 Interface Mode TMS320C3x Assembly Code Example ...

Page 66

Digital Interface (Continued) TMS320C3x Assembly Code Example (Continued 11879 – 93 ...

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Digital Interface (Continued) TMS320C3x Assembly Code Example (Continued 11879 – 94 ...

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Digital Interface (Continued) TMS320C3x Assembly Code Example (Continued 11879 – 95 ...

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Digital Interface (Continued) TMS320C3x Assembly Code Example (Continued 11879 – 97 ...

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Digital Interface (Continued BUS INTERFACE 2 The I C bus is a serial synchronous bus structure multi-master bus which means that more than one device capable of controlling the bus ...

Page 71

Digital Interface (Continued) 71 ...

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Digital Interface (Continued Example of Interfacing Bus Controller (No Assembly Code) Note Other device pins are not shown FIGURE 18 Interfacing the DAS Bus Controller ...

Page 73

Analog Considerations 8 1 REFERENCE VOLTAGE The difference between the voltages applied to the V and V is the analog input voltage span (the difference REF b between the voltages applied across two multiplexer inputs or the voltage ...

Page 74

Analog Considerations The LM12434 8 is designed to operate from a single power supply The LM12 L 438 is designed to operate from a single 3 3V supply The separate supply and ground a pins for the analog ...

Page 75

Analog Considerations (a) Through Hole Technology with 28-Pin PLCC Socket FIGURE 20 Printed Circuit Board Layout for LM12434 and LM12 L 438 (Continued 11879– 50 ...

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Analog Considerations (b) Surface Mount Technology for 28-Pin PLCC Package FIGURE 20 Printed Circuit Board Layout for LM12434 and LM12 L 438 (Continued) (Continued 11879 – 51 ...

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Analog Considerations Microcontroller (Standard Interface Mode) FIGURE 21 General Schematic of the DAS Operating in Standard Interface Mode (Continued 11879– 83 ...

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78 ...

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... Physical Dimensions inches (millimeters) Order Number LM12434CIWM LM12438CIWM or LM12L438CIWM NS Package Number M28B 79 ...

Page 80

Physical Dimensions inches (millimeters) (Continued) Order Number LM12434CIV LM12438CIV or LM12L438CIV LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL ...

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